Patents by Inventor Shin-An Li

Shin-An Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240158477
    Abstract: A nanobody capable of specifically recognizing SARS-CoV-2 spike glycoprotein RBD is provided, and the nanobody comprises a CDR having an amino acid sequence selected from at least one of the following or at least 95% identical to the following: a CDR sequence of a heavy chain variable region: SEQ ID NO: 1˜21.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 16, 2024
    Applicant: Bioduro (Jiangsu) Co., Ltd.
    Inventors: Xiang Li, Yi Xiong, Shin-Chen Hou, Chenguang Cai, Yanbin Guan
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240134196
    Abstract: An optical display system and a head-mounted display electronics apparatus are disclosed. The optical display system comprises: an image-generating apparatus, which generates image light; and an image-viewing apparatus, which guides the image light to eyes of a viewer, wherein the image-viewing apparatus comprises an imaging optical assembly and a multifocal assembly placed, the multifocal assembly has at least two optical powers and is programmable to choose at least one of the optical powers at a given time.
    Type: Application
    Filed: December 31, 2021
    Publication date: April 25, 2024
    Applicants: University of Central Florida Research Foundation, Inc., Goertek Inc.
    Inventors: JIANGHAO XIONG, Tao Zhan, Junyu Zou, Kun Li, Shin-Tson Wu
  • Publication number: 20240126082
    Abstract: An optical display system and an electronics apparatus are disclosed. The optical display system comprises: a display unit, which generate a first image light and a second image light, wherein the first image light is in a first polarization state and the second image light is in a second polarization state and the first image light and the second image light are generated by a same display panel; a resolution enhancement optic unit, which enhances the resolution of the first image light with respect to the second image light; and a magnifying optic unit, which magnify the first and second image lights from the resolution enhancement optic unit.
    Type: Application
    Filed: March 1, 2022
    Publication date: April 18, 2024
    Applicants: University of Central Florida Research Foundation, Inc., Goertek Inc.
    Inventors: KUN YIN, Ziqian He, Shin-Tson Wu, Kun Li
  • Publication number: 20240118547
    Abstract: An optical display system and an electronics device are disclosed. The optical display system comprises: a display, which generating image light of a first polarization; a partial reflector, which transmits the image light without changing its polarization and reflects the image light with its polarization being changed to a second polarization; a first optic unit, placed after the partial reflector, which includes at least one refractive lens for chromatic aberration correction; and a reflection-type Pancharatnam-Berry lens, which is placed after the first optic unit and works in the Bragg regime, and which reflects the image light of the first polarization and transmits the image light of the second polarization.
    Type: Application
    Filed: February 20, 2021
    Publication date: April 11, 2024
    Applicants: University of Central Florida Research Foundation, Inc., Goertek Inc.
    Inventors: Tao Zhan, Yannanqi Li, Kun Yin, Jianghao Xiong, Shin-Tson Wu, Sheng Liu, Kun Li
  • Publication number: 20240111168
    Abstract: An optical display system and an electronics apparatus are disclosed. The optical display system comprises: an image source, which generates image light; and an optical combiner, which includes two reflection-type polarization volume lenses working in a Bragg regime, wherein a first reflection-type polarization volume lens of the two reflection-type polarization volume lenses diffracts the image light of a first polarization to a first image and transmits the image light of a second polarization, and a second reflection-type polarization volume lens of the two reflection-type polarization volume lenses diffracts the image light of a third polarization to a second image and transmits the image light of a fourth polarization, the optical combiner outputs the first image and/or the second image as an combined image.
    Type: Application
    Filed: February 8, 2022
    Publication date: April 4, 2024
    Applicants: University of Central Florida Research Foundation, Inc., Goertek Inc.
    Inventors: KUN YIN, Ziqian He, Shin-Tson Wu, Kun Li
  • Publication number: 20240089573
    Abstract: A photosensitive assembly includes a circuit board. The circuit board has a first surface, a second surface opposite to the first surface, and a first through hole extending through the first surface and the second surface. A photosensitive chip is disposed on the second surface. The photosensitive chip has a photosensitive area and a non-photosensitive area connected to the photosensitive area, the non-photosensitive area is electrically connected to one side of the second surface, and the photosensitive area is exposed from the first through hole. A reinforcing plate is disposed on the first surface. A thermal conductive layer is disposed on the photosensitive chip, and the thermal conductive layer includes a silica gel or a metal.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Inventors: KUN LI, SHIN-WEN CHEN, BO-YING ZHU, YU-SHUAI LI, JIAN-CHAO SONG, WU-TONG WANG
  • Publication number: 20230413172
    Abstract: The present invention discloses a wireless communication apparatus having transmission strategy adjusting mechanism that includes a receiving circuit, a detection circuit, a statistics circuit, a strategy determining circuit and a transmission circuit. The receiving circuit receives communication behaviors of external apparatuses. The detection circuit detects inter frame spaces (IFS) corresponding to the communication behaviors and records related time lengths and a set of communication parameters. The statistics circuit performs statistics on the inter frame space according to a plurality of time intervals to generate Inter frame space statistics data. The strategy determining circuit analyzes at least one of the time lengths, communication parameters and Inter frame space statistics data according to at least one application requirement to generate a transmission parameter adjusting signal.
    Type: Application
    Filed: May 25, 2023
    Publication date: December 21, 2023
    Inventors: WEI-SHIN LI, CHUN-CHU CHANG
  • Patent number: 11733203
    Abstract: A sensing cell includes: a first electrode coupled to a gate of a transistor, a second electrode spaced apart from the first electrode; a protective layer covering sidewalls of the first electrode and the second electrode and having a first opening and a second opening exposing a first part of the first electrode and a second part of the second electrode, respectively; a first well located on the protective layer and surrounding the first electrode and the second electrode and having a third opening exposing the first part of the first electrode, the second part of the second electrode, and the protective layer between the first opening and the second opening; a second well located on the protective layer surrounding the first well and having a fourth opening to limit a flow of a liquid to be tested; and an ion selective membrane located in the third opening.
    Type: Grant
    Filed: January 24, 2021
    Date of Patent: August 22, 2023
    Assignee: National Tsing Hua University
    Inventors: Yu-Lin Wang, Shin-Li Wang
  • Patent number: 11631447
    Abstract: A memory circuit includes a memory cell and a source line transistor. The memory cell includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The second transistor and the third transistor form an inverter electrically connected to a drain of the first transistor. The inverter is configured to store two states with different applied voltages. The fourth transistor is electrically connected to a node of the inverter. The source line transistor is electrically connected to the fourth transistor.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: April 18, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Wei-Xiang You, Pin Su, Kai-Shin Li, Chenming Hu
  • Publication number: 20220366959
    Abstract: A method includes forming a first transistor, a second transistor, a third transistor, and a fourth transistor over a substrate, wherein at least the second and third transistors include ferroelectric materials; forming an interlayer dielectric (ILD) layer over the first to fourth transistors; forming a first metal line over the ILD layer to interconnect drains of the second and third transistors and a gate of the fourth transistor; forming a second metal line over the ILD layer to interconnect a drain of the first transistor and gates of the second and third transistors; forming a write word line over the ILD layer and electrically connected to a gate of the first transistor but electrically isolated from the fourth transistor; forming a word line over the ILD layer and electrically connected to a source of the first transistor; and forming a bit line electrically connected to the fourth transistor.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Wei-Xiang YOU, Pin SU, Kai-Shin LI, Chenming HU
  • Patent number: 11451437
    Abstract: A system may provision a smart device to allow the smart device to communicate using a network and use at least one service of a management platform. A device identifier of the smart device may be stored in a data store accessible to the management platform. The smart device may send a message to the management platform that includes the device identifier, and in some implementations other information such as location information. The management platform may determine that the smart device has been provisioned, for example based on the device identifier or other information, and provide a service to the smart device from the management platform.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: September 20, 2022
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Harsha Viswanathan, Sambit Mishra, Nick G. Suizo, Maryam Seraj, Shin-li Cecily Liu, Kent Ryhorchuk, Scott Tillman, David L. Tucker
  • Publication number: 20220128508
    Abstract: A sensing cell includes: a first electrode coupled to a gate of a transistor, a second electrode spaced apart from the first electrode; a protective layer covering sidewalls of the first electrode and the second electrode and having a first opening and a second opening exposing a first part of the first electrode and a second part of the second electrode, respectively; a first well located on the protective layer and surrounding the first electrode and the second electrode and having a third opening exposing the first part of the first electrode, the second part of the second electrode, and the protective layer between the first opening and the second opening; a second well located on the protective layer surrounding the first well and having a fourth opening to limit a flow of a liquid to be tested; and an ion selective membrane located in the third opening.
    Type: Application
    Filed: January 24, 2021
    Publication date: April 28, 2022
    Applicant: National Tsing Hua University
    Inventors: Yu-Lin Wang, Shin-Li Wang
  • Publication number: 20220006692
    Abstract: A system may provision a smart device to allow the smart device to communicate using a network and use at least one service of a management platform. A device identifier of the smart device may be stored in a data store accessible to the management platform. The smart device may send a message to the management platform that includes the device identifier, and in some implementations other information such as location information. The management platform may determine that the smart device has been provisioned, for example based on the device identifier or other information, and provide a service to the smart device from the management platform.
    Type: Application
    Filed: July 28, 2020
    Publication date: January 6, 2022
    Inventors: Harsha VISWANATHAN, Sambit MISHRA, Nick G. SUIZO, Maryam SERAJ, Shin-li Cecily LIU, Kent RYHORCHUK, Scott TILLMAN, David L. TUCKER
  • Patent number: 11058020
    Abstract: The present disclosure discloses a wall mount device adapted to be fixed to a wall surface and carry an electronic device with connecting wires. The wall mount device comprises a wall mount, a first and a second wire arrangement component. The wall mount has an upper and a lower surface. The upper surface faces the wall surface and the lower surface faces the electronic device. The first wire arrangement component is positioned on the lower surface and adjacent to a first side of the wall mount. The second wire arrangement component is positioned on the lower surface and adjacent to a second side vertical to the first side of the wall mount. The connecting wires are sequentially and detachably accommodated in the first and the second wire arrangement component from the electronic device to fix the connecting wires to corresponding positions on the wall mount.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: July 6, 2021
    Assignee: PEGATRON CORPORATION
    Inventors: Ming-Han Chang, Chin-Yuan Chang, Ling-Chieh Kung, Yu-Shin Li
  • Patent number: 10956827
    Abstract: The present disclosure provides for a method of designing a radiofrequency or broadband pulse sequence. The method can comprise a qubit (e.g., nuclear spin, photon, electron, atomic spin, dot spin) and a harmonic oscillator wherein a flip angle is controlled by steering a spring between specific states.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: March 23, 2021
    Assignee: Washington University
    Inventor: Jr-Shin Li
  • Publication number: 20210028178
    Abstract: A memory circuit includes a memory cell and a source line transistor. The memory cell includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The second transistor and the third transistor form an inverter electrically connected to a drain of the first transistor. The inverter is configured to store two states with different applied voltages. The fourth transistor is electrically connected to a node of the inverter. The source line transistor is electrically connected to the fourth transistor.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 28, 2021
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Wei-Xiang YOU, Pin SU, Kai-Shin LI, Chenming HU
  • Patent number: 10883961
    Abstract: A detecting method for blood is provided. The method includes the following steps. A sensing device including a base and at least one response electrode is provided, wherein the response electrode is spaced apart from a gate end of the base. Blood including blood cells and targets is disposed on the response electrode. The blood is separated into a first part and a second part, wherein the first part is in contact with the response electrode, and the blood cell count in the first part is less than that in the second part. A voltage is applied on the response electrode, such that an electric field is generated between the response electrode and the gate end of the base, and a detection current generated from the base is measured to detect a characterize of the targets.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: January 5, 2021
    Assignee: National Tsing Hua University
    Inventors: Yu-Lin Wang, Indu Sarangadharan, Shin-Li Wang
  • Patent number: 10693416
    Abstract: A system for entraining an oscillator ensemble is disclosed that includes a plurality of oscillators in an entrained phase pattern. The system includes an entrainment device operatively coupled to each non-linear oscillator of the oscillator ensemble, and the entrainment control device is configured to deliver a 2?-periodic control signal v(?) to all oscillators of the plurality of oscillators to induce the entrained phase pattern.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: June 23, 2020
    Assignee: Washington University
    Inventors: Jr-Shin Li, Anatoly Zlotnik
  • Publication number: 20200187372
    Abstract: The present disclosure discloses a wall mount device adapted to be fixed to a wall surface and carry an electronic device with connecting wires. The wall mount device comprises a wall mount, a first and a second wire arrangement component. The wall mount has an upper and a lower surface. The upper surface faces the wall surface and the lower surface faces the electronic device. The first wire arrangement component is positioned on the lower surface and adjacent to a first side of the wall mount. The second wire arrangement component is positioned on the lower surface and adjacent to a second side vertical to the first side of the wall mount. The connecting wires are sequentially and detachably accommodated in the first and the second wire arrangement component from the electronic device to fix the connecting wires to corresponding positions on the wall mount.
    Type: Application
    Filed: October 23, 2019
    Publication date: June 11, 2020
    Applicant: PEGATRON CORPORATION
    Inventors: Ming-Han Chang, Chin-Yuan Chang, Ling-Chieh Kung, Yu-Shin Li