Patents by Inventor Shin-Cheng LIU

Shin-Cheng LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240021694
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first superlattice structure and a second superlattice structure over the substrate, a gate stack that surrounds a channel region of each of the first superlattice structures and the second superlattice structure, and source/drain structures on opposite sides of the gate stack contacting sidewalls of the first superlattice structure and the second superlattice structure. The second superlattice structure is disposed over the first superlattice structure. Each of the first superlattice structures and the second superlattice structure includes vertically stacked alternating first nanosheets of a first semiconductor material and second nanosheets of a second semiconductor material that is different from the first semiconductor material.
    Type: Application
    Filed: July 31, 2023
    Publication date: January 18, 2024
    Inventors: Shin-Cheng LIU, Kuei-Shu CHANG LIAO
  • Patent number: 11804532
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first superlattice structure and a second superlattice structure over the substrate, a gate stack that surrounds a channel region of each of the first superlattice structures and the second superlattice structure, and source/drain structures on opposite sides of the gate stack contacting sidewalls of the first superlattice structure and the second superlattice structure. The second superlattice structure is disposed over the first superlattice structure. Each of the first superlattice structures and the second superlattice structure includes vertically stacked alternating first nanosheets of a first semiconductor material and second nanosheets of a second semiconductor material that is different from the first semiconductor material.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 31, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shin-Cheng Liu, Kuei-Shu Chang Liao
  • Publication number: 20230060784
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first superlattice structure and a second superlattice structure over the substrate, a gate stack that surrounds a channel region of each of the first superlattice structures and the second superlattice structure, and source/drain structures on opposite sides of the gate stack contacting sidewalls of the first superlattice structure and the second superlattice structure. The second superlattice structure is disposed over the first superlattice structure. Each of the first superlattice structures and the second superlattice structure includes vertically stacked alternating first nanosheets of a first semiconductor material and second nanosheets of a second semiconductor material that is different from the first semiconductor material.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Shin-Cheng LIU, Kuei-Shu CHANG LIAO