Abstract: One embodiment relates to a polymerizable composition and an optical material produced therefrom which has excellent lightfastness and minimized color defects, and more specifically, the polymerizable composition according to one embodiment includes UV absorbers having, as the main absorption wavelength, either a long-wavelength region or a short-Wavelength region Within the UV region, wherein the UV absorbers do not absorb in the Visible light region. Accordingly, the polymerizable composition may be used to provide an optical material having excellent lightfastness and minimized color defects.

Abstract: A display device includes a data conductive layer including a first power line, a passivation layer with a first opening exposing the first power line, a via layer with a second opening partially overlapping the first opening, a pixel electrode on the via layer, a connection electrode in the first and second openings, a pixel-defining film with an opening overlapping the second opening, a light-emitting layer on the pixel-defining film, the pixel electrode and the connection electrode, and a common electrode connected to the first power line. The data conductive layer includes a data base layer, a data main metal layer, and a data capping layer, the first power line includes a wire connection structure, in which the data main metal layer is recessed from sides of the data capping layer, and the common electrode is connected to the data main metal layer in the wire connection structure.

Abstract: A transistor array substrate includes a substrate, an active layer disposed on the substrate and including a channel region, a source region and a drain region, a gate insulating layer disposed on a part of the active layer, a gate electrode overlapping the channel region of the active layer and included in an electrode conductive layer which is disposed on the gate insulating layer, a source electrode included in the electrode conductive layer and in contact with a part of the source region of the active layer, and a drain electrode included in the electrode conductive layer and in contact with a part of the drain region of the active layer. The active layer includes an oxide semiconductor including crystals and is disposed as an island shape excluding a hole in a plan view.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

Abstract: The present invention relates to a high voltage-type redox flow battery comprising: a plurality of modules (1001, 1002, 1003, . . , 100n) which are serially connected; and a battery management system (BMS) for monitoring a state-of-charge (SOC) of each of the plurality of modules (1001, 1002, 1003, ..

Abstract: The present disclosure relates to a preparation method of a super absorbent polymer having excellent basic absorbency and liquid permeability at the same time by optimizing the degree of cross-linking of a base resin powder and a surface cross-linked layer, and a super absorbent polymer prepared therefrom.

Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.

Abstract: Methods, apparatuses, and systems related to embedded metal pads are described. An example semiconductor device includes a dielectric material, a metal pad having side surface, where a lower portion of the side surface is embedded in the dielectric material, a mask material on a portion of a surface of the dielectric material, an upper portion of the side surface of the metal pad, and a portion of a top surface of the metal pad and a contact pillar on a second portion of the top surface of metal pad, the contact pillar comprising a metal pillar and a pillar bump.

Abstract: Embodiments of the present disclosure provide a method for forming a semiconductor package. In one embodiment, the method includes providing a first integrated circuit die having a first circuit design on a substrate, providing a second integrated circuit die having a second circuit design on the substrate, wherein the first and second integrated circuit dies are separated from each other by a scribe line.

Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a third dielectric layer over the second dielectric layer, a second contact feature extending through the second dielectric layer and the third dielectric layer, and a graphene layer between the second contact feature and the third dielectric layer.

Abstract: Multiphase flowmeter aperture antenna transmission and pressure retention are disclosed herein. An example apparatus includes at least one radiating element to transmit or receive an electromagnetic signal along a measurement plane orthogonal to a direction of flow of the fluid in the vessel; a pressure retaining member to prevent fluid from entering the aperture antenna assembly through a measurement window of the aperture antenna assembly, at least a portion of the pressure retaining member to separate the radiating element and the fluid; and a metal housing with or without slits, the pressure retaining member to be at least partially within the metal housing, the radiating element to be coupled to the metal housing.

Abstract: The present invention relates to a modular redox flow battery comprising a positive electrolyte tank, a negative electrolyte tank, a positive electrolyte, a negative electrolyte, a plurality of stacks, pipes, a positive electrolyte pump and a negative electrolyte pump, a battery management system (=BMS), and sensors, wherein the stacks and the BMS 500 are mounted on a stack frame 800, the positive electrolyte tank and the negative electrolyte tank are mounted on a tank frame 900, and the stack frame 800 and the tank frame 900 are combined.

Abstract: Multiphase flowmeter aperture antenna transmission and pressure retention are disclosed herein. An example apparatus includes at least one radiating element to transmit or receive an electromagnetic signal along a measurement plane orthogonal to a direction of flow of the fluid in the vessel; a pressure retaining member to prevent fluid from entering the aperture antenna assembly through a measurement window of the aperture antenna assembly, at least a portion of the pressure retaining member to separate the radiating element and the fluid; and a metal housing with or without slits, the pressure retaining member to be at least partially within the metal housing, the radiating element to be coupled to the metal housing.

Abstract: Provided are a 2-arylthiazole derivative or pharmaceutically acceptable salt thereof having a specific carboxamide moiety, including a substituted aminoalkyl-carboxamide moiety, a N-containing heterocyclic-alkyl-carboxamide moiety, or a N-containing heterocyclic-carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition comprising the same.

Abstract: An organic light emitting diode includes a first emitting part including a first emitting material layer (EML) and a first electron transporting layer (ETL), a second emitting part including a second EML and between the first emitting part and the second electrode, an n-type charge generation layer (CGL) contacting the first ETL and between the first ETL and the second emitting part, and a p-type CGL contacting the n-type CGL and between the n-type CGL and the second emitting part. The first ETL includes a first compound, and the n-type CGL includes a second compound and an n-type dopant. A lowest unoccupied molecular orbital (LUMO) energy level of the first compound can be higher than a LUMO energy level of the second compound.

Abstract: An organic light emitting diode includes a first electrode; a second electrode facing the first electrode; a first emitting material layer between the first and second electrodes; and a first intermediate organic layer between the first emitting material layer and the second electrode and including a first organic layer and a second organic layer between the first organic layer and the second electrode, wherein the first organic layer includes a first compound represented by Formula.

Abstract: Disclosed is a natural language query processing apparatus comprising, a processor that receives a natural language query input by a user and generates a structured query based on the natural language query, wherein the processor, when generating the structured query based on the natural language query, generates the structured query using a natural language processing result for the natural language query, a schema relationship extracted based on a relationship between subdatabases in a database related to the natural language query, and a cross-attention result generated between the natural language processing result and the schema relationship.

Abstract: Integrated circuits including an integrated standard cell structure are provided. In an embodiment, an integrated circuit includes a first transistor gated by a first input and connected to a first power supply rail and an output, a second transistor gated by a second input and connected to the first power supply rail and the output, a floating third transistor and a fourth transistor that are connected to the first power supply rail and a third power supply rail, a fifth transistor gated by the first input and connected to a second power supply rail, a sixth transistor gated by the second input and connected to the second power supply rail, a seventh transistor gated by the second input and connected to the fifth transistor and the output, and an eighth transistor gated by the first input and connected to the sixth transistor and the output.

Abstract: Provided is an integrated circuit which includes: a plurality of conductive lines extending in a first horizontal direction on a plane separate from a gate line, and including first and second conductive lines; a source/drain contact having a bottom surface connected to a source/drain region, and including a lower source/drain contact and an upper source/drain contact which are connected to each other in a vertical direction; and a gate contact having a bottom surface connected to the gate line, and extending in the vertical direction, in which the upper source/drain contact is placed below the first conductive line, and the gate contact is placed below the second conductive line. A top surface of the lower source/drain contact may be larger than a bottom surface of the upper source/drain contact.