Abstract: A nonvolatile memory device includes multi-level cells in a memory cell array including a plurality of memory blocks, and each of the memory blocks includes a plurality of pages. A method of operating the nonvolatile memory device includes pre-programming multi-bit data in a pre-program block of the memory blocks, dividing the multi-level cells into a plurality of state groups based on state codes indicating states of the multi-level cells to generate digest data indicating state group codes corresponding to the state groups, and programming the digest data in a digest block of the memory blocks.

Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.

Abstract: A nonvolatile memory device includes multi-level cells in a memory cell array including a plurality of memory blocks, and each of the memory blocks includes a plurality of pages. A method of operating the nonvolatile memory device includes pre-programming multi-bit data in a pre-program block of the memory blocks, dividing the multi-level cells into a plurality of state groups based on state codes indicating states of the multi-level cells to generate digest data indicating state group codes corresponding to the state groups, and programming the digest data in a digest block of the memory blocks.

Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.

Abstract: A nonvolatile memory device includes multi-level cells in a memory cell array including a plurality of memory blocks, and each of the memory blocks includes a plurality of pages. A method of operating the nonvolatile memory device includes pre-programming multi-bit data in a pre-program block of the memory blocks, dividing the multi-level cells into a plurality of state groups based on state codes indicating states of the multi-level cells to generate digest data indicating state group codes corresponding to the state groups, and programming the digest data in a digest block of the memory blocks.

Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.

Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.

Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.

Abstract: A nonvolatile memory device includes multi-level cells in a memory cell array including a plurality of memory blocks, and each of the memory blocks includes a plurality of pages. A method of operating the nonvolatile memory device includes pre-programming multi-bit data in a pre-program block of the memory blocks, dividing the multi-level cells into a plurality of state groups based on state codes indicating states of the multi-level cells to generate digest data indicating state group codes corresponding to the state groups, and programming the digest data in a digest block of the memory blocks.

Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.

Abstract: In a method of controlling reclaim of a nonvolatile memory device including a plurality of memory blocks, wherein each of the memory blocks includes a plurality of pages, a recovery read operation is performed on first data using an optimal read voltage determined based on the first data, when the first data includes errors which are not correctable, wherein the first data is read from a first page of a first memory block of the memory blocks, and, when the errors of the first data are corrected after the recovery read operation is performed, whether to perform a reclaim of the first page is determined based on threshold voltage distributions of memory cells of the first page, wherein the memory cells are disposed in a region of interest adjacent to the optimal read voltage.

Abstract: In a method of controlling reclaim of a nonvolatile memory device including a plurality of memory blocks, wherein each of the memory blocks includes a plurality of pages, a recovery read operation is performed on first data using an optimal read voltage determined based on the first data, when the first data includes errors which are not correctable, wherein the first data is read from a first page of a first memory block of the memory blocks, and, when the errors of the first data are corrected after the recovery read operation is performed, whether to perform a reclaim of the first page is determined based on threshold voltage distributions of memory cells of the first page, wherein the memory cells are disposed in a region of interest adjacent to the optimal read voltage.

Abstract: Provided are a nonvolatile memory and a data reading method of reading data from a nonvolatile memory by the memory controller. The data reading method includes reading data from memory cells of the nonvolatile memory, storing the read data in the internal memory, overwriting some of the read data stored in the internal memory with backup data, performing an error correction operation using the backup data stored in the internal memory, and overwriting the backup data stored in the internal memory with data corrected by the error correction operation.

Abstract: A method managing execution of recovery code in a memory system includes; upon detecting a read error using a CPU and firmware to execute recovery code defining a read recovery operation including a read retry operation, during execution of the recovery code, generating a read request directed to the read retry operation, and immediately thereafter terminating execution of the recovery code, and thereafter, only upon receiving an asynchronous interrupt from the memory controller following completion of the read retry operation, the CPU resumes execution of the recovery code by the firmware, otherwise the CPU performs another task unrelated to execution of the recovery code.

Abstract: Provided are a nonvolatile memory and a data reading method of reading data from a nonvolatile memory by the memory controller. The data reading method includes reading data from memory cells of the nonvolatile memory, storing the read data in the internal memory, overwriting some of the read data stored in the internal memory with backup data, performing an error correction operation using the backup data stored in the internal memory, and overwriting the backup data stored in the internal memory with data corrected by the error correction operation.

Abstract: A nonvolatile memory device includes a memory area having free segments and first to fourth regions having used segments. The garbage collection method includes selecting a target segment from the used segments, moving a valid data block from the selected target segment to the used segments, and erasing data of all data blocks in the selected target segment and making the selected target segment into a free segment. When the number of free segments is greater than a predefined value, the target segment is selected by a first method and valid data blocks in the target segment are moved by a second method. When the number of free segments is less than the predefined value, the target segment is selected by a third method and valid data blocks in the target segment are moved by a fourth method.

Abstract: A method managing execution of recovery code in a memory system includes; upon detecting a read error using a CPU and firmware to execute recovery code defining a read recovery operation including a read retry operation, during execution of the recovery code, generating a read request directed to the read retry operation, and immediately thereafter terminating execution of the recovery code, and thereafter, only upon receiving an asynchronous interrupt from the memory controller following completion of the read retry operation, the CPU resumes execution of the recovery code by the firmware, otherwise the CPU performs another task unrelated to execution of the recovery code.

Abstract: A nonvolatile memory device includes a memory area having free segments and first to fourth regions having used segments. The garbage collection method includes selecting a target segment from the used segments, moving a valid data block from the selected target segment to the used segments, and erasing data of all data blocks in the selected target segment and making the selected target segment into a free segment. When the number of free segments is greater than a predefined value, the target segment is selected by a first method and valid data blocks in the target segment are moved by a second method. When the number of free segments is less than the predefined value, the target segment is selected by a third method and valid data blocks in the target segment are moved by a fourth method.