Abstract: A maintenance information providing server (Web server) 20 that transmits maintenance information to a portable terminal carried by a vendor or a customer is appended to the network management system (NMS) 21 supervising the network 2, server 20 on receipt of malfunction information from the NMS 21, notifying the malfunction to one or more pre-registered portable terminals (23, 13, 33) of a communication service purveyor, vendor or the customer.

Abstract: A maintenance information providing server (Web server) 20 that transmits maintenance information to a portable terminal carried by a vendor or a customer is appended to the network management system (NMS) 21 supervising the network 2, server 20 on receipt of malfunction information from the NMS 21, notifying the malfunction to one or more pre-registered portable terminals (23, 13, 33) of a communication service purveyor, vendor or the customer.

Abstract: A system and method for operating a Broadband ISDN to support a viable virtual private network (VPN) service are attained by establishing a plurality of virtual path links connecting customer locations and broadband switching systems, by cross-connecting virtual channel links at the broadband switching systems to establish end-to-end virtual channel connections, and by policing both the input and output traffic only on the virtual path links. The egress policing function is attained through the use of the ingress policing processors by looping back one customer's traffic from an outgoing trunk into an input port on the broadband switching system.

Abstract: A negative-phase output signal in an ECL circuit is extracted by an emitter-follower circuit, and the extracted signal is differentiated at its leading edge by a capacitor driven by the emitter-follower circuit so as to form a pulse wave, thus the differentiated signal drives a transistor connected in parallel with an emitter-follower resistor to which a positive-phase output signal is supplied. With this operation, a large amount of current flows only at the trailing edge of the output signal to shorten the fall time of the output from the logic circuit.

Abstract: In a high-speed packet multiplex communication network including a transmission line with a predetermined bandwidth and accommodating a plurality of information sources, the sources having various packet delivery rates over a range of between a peak rate and a lower rate than an average rate and demanding various transport performances, the sources are preliminarily classified into a plurality of types according to transport performances required and different transmission priorities are assigned to the different types, respectively. Bandwidths of sources of first priority and second priority are determined ones corresponding to the peak rate and the average rate, respectively. A virtual bandwidth may be calculated for the second priority source as a value between the peak and average rates.

Abstract: Signals on an incoming highway of a time division switching system are written into an alternate one of first and second time switch memories and are sequentially read out of the other alternate one of the memories into the time slots of an outgoing highway of the system in accordance with a phase difference between incoming and outgoing frames and a time slot interchanging relationship between signals on the incoming highway and corresponding signals on the outgoing highway, so that the beginning of the outgoing frame coincides with one of the time slots of the incoming frame which is displaced from the beginning of the incoming frame by an amount equal to the detected phase difference.

Abstract: A switching network is constituted by a plurality of time switches which are arranged in a matrix and at cross points between a plurality of input buses and a plurality of output buses, on which frame synchronization signals are multiplexed. Each time switch includes a data memory in which data on the input bus is written in synchronism with the frame synchronization signal included in the input bus, and from which data is read out under the address control of a control memory in synchronization with the frame synchronization signal included in the output bus.

Abstract: In a time division switching system, a reference pulse generator generates constant reference timing pulses for operating a switch. First and second variable phase pulse generators generate first and second trains of variable phase timing pulses. Data signals on a first group of input lines are multiplexed in response to the timing pulses of the first train to produce a first time division multiplexed (TDM) signal and data signals on a second group of the input lines are multiplexed in response to the timing pulses of the second train to produce a second TDM signal. The TDM signals are carried on first and second highways respectively to the space switch. The first and second variable phase pulse generators are controlled so that the timing of each of the first and second TDM signals coincides in the space switch with the reference timing pulse.

Abstract: A multiplexer/demultiplexer comprises a code pattern generator for generating a series of unique code patterns at periodic intervals, a plurality of multiplexers cascaded from the code pattern generator to one end of a channel. Each of the multiplexers includes a synchronizer for detecting a particular one of the unique code patterns and a slot selector for multiplexing input data packets into time slots uniquely identified by the particular code pattern to form a data bit stream with the code patterns which is forwarded to the channel. A plurality of demultiplexers are connected to the opposite end of the channel, each of the demultiplexers comprising a synchronizer for detecting a particular one of the code patterns from the data bit stream and a gate for extracting data packets from the time slots uniquely identified by the detected code pattern.

Abstract: A current switch is disclosed. The current switch comprises an arrangement for converting the difference between input signals fed to first and second input terminals into the difference between output signals from first and second output terminals; a power source for supplying a constant current to the converting arrangement; constant voltage means connected between a first output terminal of the converting arrangement and the power source; a first resistor, one end of which is connected to the power source; a second resistor, one end of which is connected to the other end of the first resistor and the other end of which is connected to the first output terminal of the converting arrangement; and a third resistor, one end of which is connected to the other end of the first resistor and the other end of which is connected to the second output terminal of the converting arrangement, wherein an output signal is taken out of the second output terminal.