Abstract: A handwriting storing and reproducing method which takes small images including a leading edge for writing and stores the small images in a time sequential manner following a movement of a writing device. The method then reads out the stored small images and overlaps a just read out small image to a previously read out small image so as to obatain a partial image when both small images include portions which include partial handwritings coincident to one another. Thereafter, the method overlaps one partial image to another partial image-so as to obtain a larger image when both partial images include portions which include partial handwritings coincident to one another.

Abstract: A writing device for storing handwriting picks up a handwriting which is written on a paper using a lead, using a CCD area sensor by a predetermined sampling frequency, then stores the picked up image data by the storing device under the control of a microcomputer, so that data storing which data are effective for reproducing the handwriting using a comparatively simple program, is achieved.

Abstract: A handwriting storing and reproducing method which takes small images including a leading edge for writing and stores the small images in a time sequential manner following a movement of a writing device. The method then reads out the stored small images and overlaps a just read out small image to a previously read out small image so as to obtain a partial image when both small images include portions which include partial handwritings coincident to one another. Thereafter, the method overlaps one partial image to another partial image so as to obtain a larger image when both partial images include portions which include partial handwritings coincident to one another.

Abstract: Disclosure is a semiconductor memory device comprising a memory cell array having a plurality of memory cells arranged in a matrix fashion each formed of a field effect transistor and a capacitor, a plurality of word lines each connected commonly to the gates of those field effect transistors which are arranged on an identical column of the memory cell array, a plurality of digit lines each connected commonly to the drains of those field effect transistors which are arranged on an identical row of the memory cell array, and a plurality of decoder circuits for selectively activating the word lines. In the memory device, the decoder circuit produces an output signal to drive the word line to a voltage level higher than a voltage level appearing on the activated digit line.