Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.

Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.

Abstract: A thin film transistor array panel includes: a substrate, a gate line positioned on the substrate and including a gate electrode, a semiconductor layer positioned on the substrate and including an oxide semiconductor, a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, and a capping layer covering the data wire layer, in which an end of the capping layer is inwardly recessed as compared to an end of the data wire layer.

Abstract: A liquid crystal display includes a first substrate including a plurality of pixels, a second substrate facing the first substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. At least one of the pixels includes a thin film transistor disposed on a first insulating substrate, an insulating layer overlapping the thin film transistor, and a pixel electrode disposed on the insulating layer. A contact hole is formed through the insulating layer to expose a first electrode of the thin film transistor, the pixel electrode is electrically connected to the first electrode through the contact hole, and the pixel electrode has a single-layer in an area where the contact hole is formed and a double-layer on the insulating layer.

Abstract: In a thin film transistor array panel according to an exemplary embodiment of the present invention, a plasma process using a mixed gas including hydrogen gas and nitrogen gas with a ratio of a predetermined value is undertaken before depositing a passivation layer. In this manner, performance deterioration of the thin film transistor may be prevented and simultaneously, haze in a transparent electrode may be prevented. Alternatively, a first passivation layer is depsoited, then removed. A passivation layer is again re-deposited, such that little or no haze is present in the resulting passivation layer.

Abstract: A non-contact plasma-monitoring apparatus and a non-contact plasma-monitoring method are provided. The non-contact plasma-monitoring apparatus is installed in a plasma processing apparatus including a processing chamber and a power supply unit and measures at least one of an electric field and a magnetic field, which are created around power supply wiring connecting the process chamber to the power supply unit, without physically contacting the power supply wiring.

Abstract: The present invention provides a thin-film transistor (TFT) substrate, which can be fabricated simply and at reduced cost, and a method of fabricating the TFT substrate. The TFT substrate includes: an insulating substrate; gate wiring that extends on the insulating substrate in a first direction; data wiring that extends on the gate wiring in a second direction, and includes a lower layer and an upper layer; and a semiconductor pattern that is disposed under the data wiring and has substantially the same shape as the data wiring except for a channel region, wherein root-mean-square roughness of a top surface of the data wiring is 3 nm or less.

Abstract: One or more embodiments provide a liquid crystal display (LCD) including a thin-film transistor (TFT) with improved performance and a method of fabricating the LCD. In one embodiment, the LCD includes a gate electrode which is formed on an insulating substrate; an active layer which is formed on the gate electrode; an organic layer which is formed on the active layer and includes a first hole that exposes a source region and a second hole that exposes a drain region; a source electrode which fills the first hole; and a drain electrode which fills the second hole.

Abstract: A method for forming a metal line includes sequentially depositing a low-resistivity metal layer having aluminum on a base substrate and an upper layer having molybdenum on the low-resistivity metal layer, forming a photoresist pattern having a linear shape on the upper layer, etching the upper layer via a mixed gas using the photoresist pattern as a mask, the mixed gas including a chlorine based gas mixed with an additional gas having at least one of nitrogen gas, argon gas, helium gas and sulfur hexafluoride gas, and etching the low-resistivity metal layer using the photoresist pattern as the mask thereby removing any stringer that may be caused by a residue of the low-resistivity metal layer.