Patents by Inventor Shin Iwase

Shin Iwase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11926492
    Abstract: A linear transport apparatus includes a transport cart, a first roller that rotates about a first rotation shaft extending from the transport cart along a first direction, a second roller that rotates about a second rotation shaft extending from the transport cart and forming an acute angle with the first rotation shaft, and a rail sandwiched between the first and second rollers to extend along a track on which the transport cart moves. The rail includes a first contact portion coming contact with the first roller and restricting movement of the transport cart in a second direction perpendicular to a direction in which the rail extends and the first direction, and a second contact portion that comes into contact with the second roller and is parallel to the second rotation shaft, and the rail includes a portion in which curvature of the track moves is different from another portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: March 12, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takuma Nakamura, Shin Sakai, Masaoki Iwase, Kazuhiko Fukushima
  • Patent number: 10622487
    Abstract: Devices and methods for forming charge storage regions are disclosed. In one embodiment, a semiconductor device comprises a semiconductor layer having a trench, charge storage layers formed at both side surfaces of the trench, a wordline buried in the trench in contact with the charge storage layers, and source-drain regions formed in the semiconductor layer at both sides of the trench.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: April 14, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventor: Shin Iwase
  • Publication number: 20160204280
    Abstract: Devices and methods for forming charge storage regions are disclosed. In one embodiment, a semiconductor device comprises a semiconductor layer having a trench, charge storage layers formed at both side surfaces of the trench, a wordline buried in the trench in contact with the charge storage layers, and source-drain regions formed in the semiconductor layer at both sides of the trench.
    Type: Application
    Filed: February 19, 2016
    Publication date: July 14, 2016
    Inventor: Shin Iwase
  • Patent number: 9269828
    Abstract: Devices and methods for forming charge storage regions are disclosed. In one embodiment, a semiconductor device comprises a semiconductor layer having a trench, charge storage layers formed at both side surfaces of the trench, a wordline buried in the trench in contact with the charge storage layers, and source-drain regions formed in the semiconductor layer at both sides of the trench.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: February 23, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventor: Shin Iwase
  • Patent number: 7902592
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device is disclosed. The semiconductor device includes a bit line formed to extend into a semiconductor substrate, a charge storage layer formed on the semiconductor substrate, a word line formed above the charge storage layer to extend across the bit line, a gate electrode formed on the charge storage layer under the word line and between bit lines, a first insulating film formed over the bit line and to extend in the direction of the bit line and a second insulating film that includes a different material than that of the first insulating film and formed to adjoin a side surface of the first insulating film.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: March 8, 2011
    Assignee: Spansion LLC
    Inventors: Yoshihiro Mikasa, Takaya Tabuchi, Shin Iwase, Fumiaki Toyama
  • Publication number: 20090315097
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device is disclosed. The semiconductor device includes a bit line formed to extend into a semiconductor substrate, a charge storage layer formed on the semiconductor substrate, a word line formed above the charge storage layer to extend across the bit line, a gate electrode formed on the charge storage layer under the word line and between bit lines, a first insulating film formed over the bit line and to extend in the direction of the bit line and a second insulating film that includes a different material than that of the first insulating film and formed to adjoin a side surface of the first insulating film.
    Type: Application
    Filed: December 17, 2008
    Publication date: December 24, 2009
    Inventors: Yoshihiro MIKASA, Takaya TABUCHI, Shin Iwase, Fumiaki TOYAMA
  • Publication number: 20090184361
    Abstract: Devices and methods for forming charge storage regions are disclosed. In one embodiment, a semiconductor device comprises a semiconductor layer having a trench, charge storage layers formed at both side surfaces of the trench, a wordline buried in the trench in contact with the charge storage layers, and source-drain regions formed in the semiconductor layer at both sides of the trench.
    Type: Application
    Filed: July 25, 2008
    Publication date: July 23, 2009
    Inventor: Shin Iwase