Patents by Inventor Shin Katsu

Shin Katsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4883985
    Abstract: An FET circuit suitable for a latch has a pair of inverters. The input stage FET of each of the inverters is connected such that the gate electrode thereof is connected to receive an output signal of the FET of the other inverter through a circuit having an FET and at least a diode. The sources of the input stage FETs are connected to a common connection point, and a current source arrangement such as a resistor is connected between the common connection point and a power supply terminal. The circuit provides an extended allowable range of the effective threshold voltage V.sub.T and has small power consumption.
    Type: Grant
    Filed: October 28, 1987
    Date of Patent: November 28, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shin Katsu, Shutaro Nambu, Akio Shimano