Patents by Inventor Shin Kikuchi
Shin Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230115048Abstract: The stainless steel contains 0.0001 mass % or more and 0.15 mass % or less of C, 0.30 mass % or more and 2.0 mass % or less of Si, 0.1 mass % or more and 15 mass % or less of Mn, 5 mass % or more and 30 mass % or less of Ni, 0.0001 mass % or more and 0.01 mass % or less of S, 16 mass % or more and 25 mass % or less of Cr, 0 mass % or more and 5 mass % or less of Mo, 0 mass % or more and 0.005 mass % or less of Al, 0 mass % or more and 0.0010 mass % or less of Mg, 0.0010 mass % or more and 0.0060 mass % or less of 0, and 0.0001 mass % or more and 0.5 mass % or less of N, and at least includes an inclusion with an equivalent circle diameter of 5 ?m or more, having the average composition of 5 mass % or more of MnO, 20 mass % or more of Cr2O3+Al2O3, 1 mass % or more of Al2O3, and 5 mass % or less of Ca0. The number density of the inclusion having the composition is 0.5 inclusions/mm2 or less.Type: ApplicationFiled: February 24, 2021Publication date: April 13, 2023Applicant: NIPPON STEEL Stainless Steel CorporationInventors: Tooru SHIBATA, Yuto SAKAIZAWA, Shigeo FUKUMOTO, Akira TANAKA, Shin KIKUCHI
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Publication number: 20230077707Abstract: A stainless steel with reduced S and suppressed generation of hard inclusions. Inclusions with an equivalent circle diameter of 5 ?m or more, the number density of a first inclusion having the average composition of, in mass %, CaO: 0% or more and 15% or less, SiO2: 0% or more and 20% or less, Al2O3: 50% or more and 70% or less, and MgO: 10% or more and 40% or less is 0.5 inclusions/mm2 or less, the number density of a second inclusion having CaO: 10% or more and 70% or less, SiO2: 10% or more and 65% or less, Al2O3: 20% or less, MgO: 5% or more and 50% or less, and CaF2: 0% or more and 5% or less is 0.2 inclusions/mm2 or less, and the number density of a third inclusion having CaO: 5% or more and 40% or less, SiO2: 10% or more and 40% or less, Al2O3: 10% or more and 40% or less, MgO: 5% or more and 30% or less, and CaF2: 5% or more and 40% or less is 0.005 inclusions/mm2 or more and 0.5 inclusions/mm2 or less.Type: ApplicationFiled: February 24, 2021Publication date: March 16, 2023Applicant: NIPPON STEEL Stainless Steel CorporationInventors: Tooru SHIBATA, Akira TANAKA, Shigeo FUKUMOTO, Shin KIKUCHI
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Publication number: 20230077573Abstract: The stainless steel for metal foils includes, in mass %, 0.0001% or more and 0.15% or less of C, 0.30% or more and 2.0% or less of Si, 0.1% or more and 15% or less of Mn, 0.040% or less of P, 5% or more and 30% or less of Ni, 0.0001% or more and 0.01% or less of S, 16% or more and 25% or less of Cr, 5% or less of Mo, 0.005% or less of Al, 0.0030% or less of Ca, 0.0010% or less of Mg, 0.0010% or more and 0.0060% or less of O, and 0.0001% or more and 0.5% or less of N. The number of inclusions with a maximum equivalent circle diameter of 5 ?m or more is 0.5 inclusions/mm2 or less in a thickness of 0.010 mm or more and 0.2 mm or less.Type: ApplicationFiled: February 24, 2021Publication date: March 16, 2023Applicant: NIPPON STEEL Stainless Steel CorporationInventors: Yuto SAKAIZAWA, Tooru SHIBATA, Shin KIKUCHI, Shigeo FUKUMOTO
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Patent number: 10688998Abstract: A control apparatus for a four-wheel drive vehicle is configured to acquire wheel speed differences, which are differences between wheel speeds of respective wheels and a reference speed, and execute traction control of causing a braking device to apply braking forces to wheels having wheel speed differences equal to or more than a predetermined control start value, the control apparatus being configured to, when a temperature of an actuator in a hydraulic circuit of the braking device is equal to or higher than a predetermined first temperature threshold value, select, as the reference speed, a wheel speed higher than a wheel speed that is selected as the reference speed when the temperature of the actuator is lower than the first temperature threshold value.Type: GrantFiled: March 6, 2019Date of Patent: June 23, 2020Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Shin Kikuchi
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Patent number: 10419702Abstract: Provided is an imaging apparatus, including: a vertical scanning circuit configured to output the reset signal and the image signal sequentially from each of a plurality of pixels by selecting the plurality of pixels sequentially; and an amplifier unit configured to output a plurality of image signals obtained by amplifying one image signal that is output from one of the plurality of pixels at a plurality of gains including a first gain and a second gain, in which, in a reading period, which is a period between selection of a first pixel by the vertical scanning circuit out of the plurality of pixels and subsequent selection of a second pixel out of the plurality of pixels, a number of times the amplifier unit is reset is less than a number of the plurality of amplified image signals.Type: GrantFiled: December 26, 2017Date of Patent: September 17, 2019Assignee: CANON KABUSHIKI KAISHAInventors: Tomoya Onishi, Shin Kikuchi
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Publication number: 20190276023Abstract: A control apparatus for a four-wheel drive vehicle is configured to acquire wheel speed differences, which are differences between wheel speeds of respective wheels and a reference speed, and execute traction control of causing a braking device to apply braking forces to wheels having wheel speed differences equal to or more than a predetermined control start value, the control apparatus being configured to, when a temperature of an actuator in a hydraulic circuit of the braking device is equal to or higher than a predetermined first temperature threshold value, select, as the reference speed, a wheel speed higher than a wheel speed that is selected as the reference speed when the temperature of the actuator is lower than the first temperature threshold value.Type: ApplicationFiled: March 6, 2019Publication date: September 12, 2019Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Shin KIKUCHI
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Resistive random access memory device containing replacement word lines and method of making thereof
Patent number: 10283710Abstract: A method of forming a resistive memory device includes forming an alternating stack of insulating layers and sacrificial material layers that extend along a first horizontal direction over a substrate, forming a laterally alternating sequence of vertical conductive lines and dielectric pillar structures that alternate along the first horizontal direction on sidewalls of the alternating stack, forming lateral recesses by removing the sacrificial material layers selective to the insulating layers, selectively growing resistive memory material portions from physically exposed surfaces of the vertical conductive lines in the lateral recesses, and forming electrically conductive layers over the resistive memory material portions in the lateral recesses.Type: GrantFiled: September 5, 2017Date of Patent: May 7, 2019Assignee: SANDISK TECHNOLOGIES LLCInventors: Shin Kikuchi, Seje Takaki -
RESISTIVE RANDOM ACCESS MEMORY DEVICE CONTAINING REPLACEMENT WORD LINES AND METHOD OF MAKING THEREOF
Publication number: 20190074441Abstract: A method of forming a resistive memory device includes forming an alternating stack of insulating layers and sacrificial material layers that extend along a first horizontal direction over a substrate, forming a laterally alternating sequence of vertical conductive lines and dielectric pillar structures that alternate along the first horizontal direction on sidewalls of the alternating stack, forming lateral recesses by removing the sacrificial material layers selective to the insulating layers, selectively growing resistive memory material portions from physically exposed surfaces of the vertical conductive lines in the lateral recesses, and forming electrically conductive layers over the resistive memory material portions in the lateral recesses.Type: ApplicationFiled: September 5, 2017Publication date: March 7, 2019Inventors: Shin KIKUCHI, Seje TAKAKI -
Patent number: 10096654Abstract: An alternating material stack of insulator lines and first electrically conductive material layers is formed over a substrate, and is patterned to provide alternating stacks of insulating layers and first electrically conductive lines. A metal can be selectively deposited on the physically exposed sidewalls of the first electrically conductive material layers to form metal lines, while not growing from the surfaces of the insulator lines. The metal lines are oxidized to form metal oxide lines that are self-aligned to the sidewalls of the first electrically conductive lines. Vertically extending second electrically conductive lines can be formed as a two-dimensional array of generally pillar-shaped structures between the alternating stacks of the insulator lines and the first electrically conductive lines. Each portion of the metal oxide lines at junctions of first and second electrically conductive lines constitute a resistive memory element for a resistive random access memory (ReRAM) device.Type: GrantFiled: September 11, 2015Date of Patent: October 9, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Shin Kikuchi, Kazushi Komeda, Takuya Futase, Teruyuki Mine, Seje Takaki, Eiji Hayashi, Toshihide Tobitsuka
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Publication number: 20180124346Abstract: Provided is an imaging apparatus, including: a vertical scanning circuit configured to output the reset signal and the image signal sequentially from each of a plurality of pixels by selecting the plurality of pixels sequentially; and an amplifier unit configured to output a plurality of image signals obtained by amplifying one image signal that is output from one of the plurality of pixels at a plurality of gains including a first gain and a second gain, in which, in a reading period, which is a period between selection of a first pixel by the vertical scanning circuit out of the plurality of pixels and subsequent selection of a second pixel out of the plurality of pixels, a number of times the amplifier unit is reset is less than a number of the plurality of amplified image signals.Type: ApplicationFiled: December 26, 2017Publication date: May 3, 2018Inventors: Tomoya Onishi, Shin Kikuchi
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Patent number: 9894308Abstract: Provided is an imaging apparatus, including: a vertical scanning circuit configured to output the reset signal and the image signal sequentially from each of a plurality of pixels by selecting the plurality of pixels sequentially; and an amplifier unit configured to output a plurality of image signals obtained by amplifying one image signal that is output from one of the plurality of pixels at a plurality of gains including a first gain and a second gain, in which, in a reading period, which is a period between selection of a first pixel by the vertical scanning circuit out of the plurality of pixels and subsequent selection of a second pixel out of the plurality of pixels, a number of times the amplifier unit is reset is less than a number of the plurality of amplified image signals.Type: GrantFiled: July 30, 2015Date of Patent: February 13, 2018Assignee: CANON KABUSHIKI KAISHAInventors: Tomoya Onishi, Shin Kikuchi
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Patent number: 9888195Abstract: Provided is an imaging device, an imaging system, and a driving method of the imaging device. A signal of difference between a photogenerated signal of a first pixel which is an effective pixel, and a reference signal of a second pixel which is an effective pixel, is obtained.Type: GrantFiled: December 22, 2014Date of Patent: February 6, 2018Assignee: CANON KABUSHIKI KAISHAInventors: Tomoya Onishi, Shin Kikuchi
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Patent number: 9800810Abstract: One imaging apparatus includes a first amplifier circuit, a second amplifier circuit, and a limiter circuit that limits the output of the first amplifier circuit, and further includes a configuration to clamp the output of the limiter circuit. Moreover, another imaging apparatus includes a fully differential amplifier circuit that outputs an amplified noise signal amplified from a noise signal, and an amplified optical signal amplified from an optical signal, and an output limiting circuit that limits each of the amplitude range of the amplified noise signal and the amplitude range the amplified optical signal.Type: GrantFiled: August 12, 2016Date of Patent: October 24, 2017Assignee: CANON KABUSHIKI KAISHAInventors: Shin Kikuchi, Kei Ochiai
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Publication number: 20170077184Abstract: An alternating material stack of insulator lines and first electrically conductive material layers is formed over a substrate, and is patterned to provide alternating stacks of insulating layers and first electrically conductive lines. A metal can be selectively deposited on the physically exposed sidewalls of the first electrically conductive material layers to form metal lines, while not growing from the surfaces of the insulator lines. The metal lines are oxidized to form metal oxide lines that are self-aligned to the sidewalls of the first electrically conductive lines. Vertically extending second electrically conductive lines can be formed as a two-dimensional array of generally pillar-shaped structures between the alternating stacks of the insulator lines and the first electrically conductive lines. Each portion of the metal oxide lines at junctions of first and second electrically conductive lines constitute a resistive memory element for a resistive random access memory (ReRAM) device.Type: ApplicationFiled: September 11, 2015Publication date: March 16, 2017Inventors: Shin KIKUCHI, Kazushi KOMEDA, Takuya FUTASE, Teruyuki MINE, Seje TAKAKI, Eiji HAYASHI, Toshihide TOBITSUKA
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Publication number: 20170054926Abstract: One imaging apparatus includes a first amplifier circuit, a second amplifier circuit, and a limiter circuit that limits the output of the first amplifier circuit, and further includes a configuration to clamp the output of the limiter circuit. Moreover, another imaging apparatus includes a fully differential amplifier circuit that outputs an amplified noise signal amplified from a noise signal, and an amplified optical signal amplified from an optical signal, and an output limiting circuit that limits each of the amplitude range of the amplified noise signal and the amplitude range the amplified optical signal.Type: ApplicationFiled: August 12, 2016Publication date: February 23, 2017Inventors: Shin Kikuchi, Kei Ochiai
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Patent number: 9443910Abstract: A three-dimensional (3D) non-volatile memory array having a silicide bit line and method of fabricating is disclosed. The fabrication technique may comprise forming a metal silicide for at least a portion of the bit line. The device has reversible resistivity material between the word lines and the bit lines. The reversible resistivity material may be a metal oxide. The metal that is used to form the silicide may serve as an oxygen scavenger to draw oxygen away from the silicon, thus preventing formation of silicon oxide between the reversible resistivity material and the bit line. The metal silicide may also help prevent formation of a depletion layer in silicon in the bit line.Type: GrantFiled: July 9, 2015Date of Patent: September 13, 2016Assignee: SanDisk Technologies LLCInventors: Kan Fujiwara, Takuya Futase, Toshihiro Iizuka, Shin Kikuchi, Yoichiro Tanaka, Akio Nishida, Christopher J Petti
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Patent number: 9362319Abstract: An image pickup device according to the present invention is an image pickup device in which a plurality of pixel are arranged in a semiconductor substrate. Each of the plurality of pixels includes a photoelectric conversion element, a floating diffusion (FD) region, a transfer gate that transfers charges in the first semiconductor region to the FD region, and an amplification transistor whose gate is electrically connected to the FD region. The photoelectric conversion element has an outer edge which has a recessed portion in plan view, a source region and a drain region of the amplification transistor are located in the recessed portion, and the FD region is surrounded by the photoelectric conversion region or is located in the recessed portion in plan view.Type: GrantFiled: October 15, 2014Date of Patent: June 7, 2016Assignee: Canon Kabushiki KaishaInventors: Kazuaki Tashiro, Shin Kikuchi
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Patent number: 9362326Abstract: An image capturing apparatus having pixels is provided. Each pixel includes a photoelectric conversion unit including a charge accumulation region, an output unit configured to output a signal based on a potential of a node electrically connected to the charge accumulation region, and a connection unit configured to electrically connect a capacitance to the node. The charge accumulation region includes a first portion and a second portion. Charge is configured to be first accumulated in the first portion, and, after the first portion is saturated, be accumulated in the second portion. The output unit is configured to output a first signal based on the potential of the node before the capacitance is connected thereto, and, then a second signal based on the potential of the node after the capacitance is connected thereto.Type: GrantFiled: November 20, 2015Date of Patent: June 7, 2016Assignee: Canon Kabushiki KaishaInventor: Shin Kikuchi
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Publication number: 20160156870Abstract: A solid-state imaging device includes a plurality of pixels each including a photoelectric converting element and an amplifier unit for outputting a signal based on charges generated by the photoelectric converting element, a signal line connected to the plurality of pixels, a second line arranged at a position adjacent to the signal line, and a buffer unit connected to the signal line. The buffer unit buffers the signal at to the signal line, and outputs a signal having a same phase as that of the signal to the second line.Type: ApplicationFiled: November 2, 2015Publication date: June 2, 2016Inventor: Shin Kikuchi
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Publication number: 20160079298Abstract: An image capturing apparatus having pixels is provided. Each pixel includes a photoelectric conversion unit including a charge accumulation region, an output unit configured to output a signal based on a potential of a node electrically connected to the charge accumulation region, and a connection unit configured to electrically connect a capacitance to the node. The charge accumulation region includes a first portion and a second portion. Charge is configured to be first accumulated in the first portion, and, after the first portion is saturated, be accumulated in the second portion. The output unit is configured to output a first signal based on the potential of the node before the capacitance is connected thereto, and, then a second signal based on the potential of the node after the capacitance is connected thereto.Type: ApplicationFiled: November 20, 2015Publication date: March 17, 2016Inventor: Shin Kikuchi