Abstract: A magnetic memory device includes a substrate including a first region and a second region, an upper insulating layer on the substrate, a first material layer in contact with a first surface of the upper insulating layer, a lower electrode contact in the first material film, a memory structure on the lower electrode contact, a first mold insulating layer on the first material layer and between the first material layer and the memory structure, an etching stop film on the memory structure and the first mold insulating layer, a second mold insulating layer on the upper insulating layer on the second region, and a second material layer in contact with the first surface of the upper insulating layer on the second region and between the upper insulating layer and the second mold insulating layer.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, interconnection lines on the cell region and the peripheral region, the interconnection lines being spaced apart from the substrate in a first direction perpendicular to a top surface of the substrate, a lower insulating layer on the cell region and the peripheral region, the lower insulating layer covering the interconnection lines, and a top surface of the lower insulating layer on the cell region being at a lower height than top surfaces of uppermost interconnection lines of the interconnection lines, and data storage patterns on the lower insulating layer on the cell region, the data storage patterns being horizontally spaced apart from each other, and the data storage patterns being connected directly to the top surfaces of the uppermost interconnection lines on the cell region.

Abstract: A semiconductor device includes a substrate including a first region and a second region, data storage patterns on the first region and spaced apart from each other in a first direction, an upper insulating layer on the first and second regions and on the data storage patterns, a cell line structure penetrating the upper insulating layer on the first region, extending in the first direction, and electrically connected to the data storage patterns, and an upper connection structure penetrating the upper insulating layer on the second region. The upper connection structure includes an upper conductive line, and upper conductive contacts arranged along a bottom surface of the upper conductive line. The bottom surface of the upper conductive line is located at a height higher than a bottom surface of the cell line structure. A side surface of the cell line structure has a straight line shape continuously-extended.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a first lower insulating layer disposed on the cell region and extending onto the peripheral region, a second lower insulating layer disposed on the first lower insulating layer on the cell region and extending onto the first lower insulating layer on the peripheral region, data storage patterns disposed on the second lower insulating layer on the cell region, a cell insulating layer disposed on the second lower insulating layer on the cell region and covering the data storage patterns, and a peripheral insulating layer disposed on the second lower insulating layer on the peripheral region and including a material different from the cell insulating layer. A thickness of the second lower insulating layer on the peripheral region is smaller than a maximum thickness of the second lower insulating layer on the cell region.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, interconnection lines on the cell region and the peripheral region, the interconnection lines being spaced apart from the substrate in a first direction perpendicular to a top surface of the substrate, a lower insulating layer on the cell region and the peripheral region, the lower insulating layer covering the interconnection lines, and a top surface of the lower insulating layer on the cell region being at a lower height than top surfaces of uppermost interconnection lines of the interconnection lines, and data storage patterns on the lower insulating layer on the cell region, the data storage patterns being horizontally spaced apart from each other, and the data storage patterns being connected directly to the top surfaces of the uppermost interconnection lines on the cell region.

Abstract: A semiconductor device includes a substrate including a first region and a second region, data storage patterns on the first region and spaced apart from each other in a first direction, an upper insulating layer on the first and second regions and on the data storage patterns , a cell line structure penetrating the upper insulating layer on the first region, extending in the first direction, and electrically connected to the data storage patterns, and an upper connection structure penetrating the upper insulating layer on the second region. The upper connection structure includes an upper conductive line, and upper conductive contacts arranged along a bottom surface of the upper conductive line. The bottom surface of the upper conductive line is located at a height higher than a bottom surface of the cell line structure. A side surface of the cell line structure has a straight line shape continuously-extended.

Abstract: Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.

Abstract: A semiconductor device may include a first magnetic layer including a plurality of first regions configuring a plurality of memory cells and spaced apart from each other on a substrate, and a second region encompassing the plurality of first regions and electrically isolated from the first regions, a tunnel barrier layer disposed on the first magnetic layer, and a second magnetic layer disposed on the tunnel barrier layer.

Abstract: Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.

Abstract: Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.

Abstract: A method of fabricating a semiconductor device includes forming conductive pillars on a substrate, sequentially forming a sacrificial layer and a molding structure between the conductive pillars, forming a conductive layer on the molding structure, such that the conductive layer is connected to the conductive pillars, removing the sacrificial layer to form an air gap, removing the molding structure to form an expanded air gap, and patterning the conductive layer to open the expanded air gap.

Abstract: A semiconductor device may include a first magnetic layer including a plurality of first regions configuring a plurality of memory cells and spaced apart from each other on a substrate, and a second region encompassing the plurality of first regions and electrically isolated from the first regions, a tunnel barrier layer disposed on the first magnetic layer, and a second magnetic layer disposed on the tunnel barrier layer.

Abstract: In a method of manufacturing an MRAM device, a first sacrificial layer, an etch stop layer, and a second sacrificial layer are sequentially formed on a substrate and then partially etched to form openings therethrough. Lower electrodes are formed to fill the openings. The first and second sacrificial layers and portions of the etch stop layer are removed to form etch stop layer patterns surrounding upper portions of sidewalls of the lower electrodes, respectively. An upper insulating layer pattern is formed between the etch stop layer patterns to partially define an air pad between the lower electrodes. A first magnetic layer, a tunnel barrier layer, a second magnetic layer, and an upper electrode layer are formed, and are etched to form a plurality of magnetic tunnel junction (MTJ) structures.

Abstract: A method of fabricating a semiconductor device includes forming conductive pillars on a substrate, sequentially forming a sacrificial layer and a molding structure between the conductive pillars, forming a conductive layer on the molding structure, such that the conductive layer is connected to the conductive pillars, removing the sacrificial layer to form an air gap, removing the molding structure to form an expanded air gap, and patterning the conductive layer to open the expanded air gap.

Abstract: In a method of manufacturing an MRAM device, a first sacrificial layer, an etch stop layer, and a second sacrificial layer are sequentially formed on a substrate and then partially etched to form openings therethrough. Lower electrodes are formed to fill the openings. The first and second sacrificial layers and portions of the etch stop layer are removed to form etch stop layer patterns surrounding upper portions of sidewalls of the lower electrodes, respectively. An upper insulating layer pattern is formed between the etch stop layer patterns to partially define an air pad between the lower electrodes. A first magnetic layer, a tunnel barrier layer, a second magnetic layer, and an upper electrode layer are formed, and are etched to form a plurality of magnetic tunnel junction (MTJ) structures.

Abstract: Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.