Patents by Inventor Shin Morita

Shin Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9389473
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including an insulative substrate, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a fourth electrically conductive layer. The first electrically conductive layer includes a gate line located on the insulative substrate, a common potential line and a first pad portion. The second electrically conductive layer includes a common electrode which is located on the insulative substrate and is put in contact with the common potential line, and a second pad portion stacked on the first pad portion. The fourth electrically conductive layer includes a pixel electrode in which a slit facing the common electrode is formed, and a third pad portion which is put in contact with the second pad portion.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: July 12, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventor: Shin Morita
  • Publication number: 20160085107
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including an insulative substrate, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a fourth electrically conductive layer. The first electrically conductive layer includes a gate line located on the insulative substrate, a common potential line and a first pad portion. The second electrically conductive layer includes a common electrode which is located on the insulative substrate and is put in contact with the common potential line, and a second pad portion stacked on the first pad portion. The fourth electrically conductive layer includes a pixel electrode in which a slit facing the common electrode is formed, and a third pad portion which is put in contact with the second pad portion.
    Type: Application
    Filed: December 4, 2015
    Publication date: March 24, 2016
    Applicant: Japan Display Inc.
    Inventor: Shin MORITA
  • Patent number: 9244318
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including an insulative substrate, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a fourth electrically conductive layer. The first electrically conductive layer includes a gate line located on the insulative substrate, a common potential line and a first pad portion. The second electrically conductive layer includes a common electrode which is located on the insulative substrate and is put in contact with the common potential line, and a second pad portion stacked on the first pad portion. The fourth electrically conductive layer includes a pixel electrode in which a slit facing the common electrode is formed, and a third pad portion which is put in contact with the second pad portion.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: January 26, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventor: Shin Morita
  • Patent number: 9229282
    Abstract: In one embodiment, a first wiring line is pulled out from an active area, and a short ring circuit is provided in a peripheral portion of the active area. A first electrode is formed in the same layer as the first wiring line. A semiconductor layer is formed on the first electrode. A portion of a second electrode faces the first electrode through an insulating layer and arranged on the semiconductor layer. A third electrode is arranged on the semiconductor layer in the same layer as the second electrode. The first electrode includes a cutout portion arranged under an edge of the second electrode.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: January 5, 2016
    Assignee: Japan Display Inc.
    Inventor: Shin Morita
  • Patent number: 9189724
    Abstract: The present invention provides a noncontact interface technique capable of performing communication operation without stopping an internal operation even when a clock signal cannot be extracted from a carrier wave. In a semiconductor device that receives a modulated carrier wave from an antenna, generates an internal clock signal on the basis of a clock signal extracted from the received carrier wave, and performs operation synchronously with the internal clock signal, a PLL circuit that receives the extracted clock signal and generates the internal clock signal is provided with a voltage control oscillation function. In the case where the clock signal extracted from the carrier wave is discretely interrupted, the function makes the internal clock signal maintained at a frequency immediately before the interruption. With the configuration, even when the clock signal extracted from the carrier wave is interrupted, internal data processes such as decoding and bus interfacing can be continued.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: November 17, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shin Morita, Norihisa Yamamoto
  • Publication number: 20150286089
    Abstract: An LCD device according to a group of embodiments comprises: a display panel comprising array and counter substrates, as well as a liquid-crystal layer and a sealing material that are interposed between the substrates adhered with each other; a light illuminating the display panel; a framework covering at least front and end faces of a peripheral part of the display panel; and a resin layer that covers the end faces of the display panel throughout their whole dimensions in a thickness direction of the display panel; and contour of the resin layer on its outside being smoothly curved along the thickness direction, in a section cut in the thickness direction.
    Type: Application
    Filed: April 7, 2015
    Publication date: October 8, 2015
    Applicant: Japan Display Inc.
    Inventors: Ayano SOEJIMA, Kazuyuki Sunohara, Daigo Fujita, Shin Morita
  • Patent number: 9146416
    Abstract: In a liquid crystal display apparatus, a pair of substrates has surfaces which is so arranged as to be opposed to each other. The one of the opposed surfaces has a display region in which pixels are arrayed in a matrix. A liquid crystal layer is held between the opposed surfaces of the pair of substrates. A first shading portion is arranged to surround the display region. A second shading portion is arranged between the first shading portion and an outer peripheral end of the one of the substrates, and is formed as discontinuous segments.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: September 29, 2015
    Assignee: Japan Display Inc.
    Inventors: Masanobu Yoneyama, Shin Morita
  • Publication number: 20150116646
    Abstract: In one embodiment, a first wiring line is pulled out from an active area, and a short ring circuit is provided in a peripheral portion of the active area. A first electrode is formed in the same layer as the first wiring line. A semiconductor layer is formed on the first electrode. A portion of a second electrode faces the first electrode through an insulating layer and arranged on the semiconductor layer. A third electrode is arranged on the semiconductor layer in the same layer as the second electrode. The first electrode includes a cutout portion arranged under an edge of the second electrode.
    Type: Application
    Filed: December 31, 2014
    Publication date: April 30, 2015
    Applicant: Japan Display Inc.
    Inventor: Shin MORITA
  • Publication number: 20150072737
    Abstract: The present invention provides a noncontact interface technique capable of performing communication operation without stopping an internal operation even when a clock signal cannot be extracted from a carrier wave. In a semiconductor device that receives a modulated carrier wave from an antenna, generates an internal clock signal on the basis of a clock signal extracted from the received carrier wave, and performs operation synchronously with the internal clock signal, a PLL circuit that receives the extracted clock signal and generates the internal clock signal is provided with a voltage control oscillation function. In the case where the clock signal extracted from the carrier wave is discretely interrupted, the function makes the internal clock signal maintained at a frequency immediately before the interruption. With the configuration, even when the clock signal extracted from the carrier wave is interrupted, internal data processes such as decoding and bus interfacing can be continued.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventors: Shin Morita, Norihisa Yamamoto
  • Patent number: 8976309
    Abstract: In one embodiment, a first wiring line is pulled out from an active area, and a short ring circuit is provided in a peripheral portion of the active area. A first electrode is formed in the same layer as the first wiring line. A semiconductor layer is formed on the first electrode. A portion of a second electrode faces the first electrode through an insulating layer and arranged on the semiconductor layer. A third electrode is arranged on the semiconductor layer in the same layer as the second electrode. The first electrode includes a cutout portion arranged under an edge of the second electrode.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: March 10, 2015
    Assignee: Japan Display Inc.
    Inventor: Shin Morita
  • Publication number: 20150015841
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including an insulative substrate, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a fourth electrically conductive layer. The first electrically conductive layer includes a gate line located on the insulative substrate, a common potential line and a first pad portion. The second electrically conductive layer includes a common electrode which is located on the insulative substrate and is put in contact with the common potential line, and a second pad portion stacked on the first pad portion. The fourth electrically conductive layer includes a pixel electrode in which a slit facing the common electrode is formed, and a third pad portion which is put in contact with the second pad portion.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 15, 2015
    Applicant: Japan Display Inc.
    Inventor: Shin MORITA
  • Patent number: 8908671
    Abstract: The present invention provides a noncontact interface technique capable of performing communication operation without stopping an internal operation even when a clock signal cannot be extracted from a carrier wave. In a semiconductor device that receives a modulated carrier wave from an antenna, generates an internal clock signal on the basis of a clock signal extracted from the received carrier wave, and performs operation synchronously with the internal clock signal, a PLL circuit that receives the extracted clock signal and generates the internal clock signal is provided with a voltage control oscillation function. In the case where the clock signal extracted from the carrier wave is discretely interrupted, the function makes the internal clock signal maintained at a frequency immediately before the interruption. With the configuration, even when the clock signal extracted from the carrier wave is interrupted, internal data processes such as decoding and bus interfacing can be continued.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: December 9, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Shin Morita, Norihisa Yamamoto
  • Patent number: 8879041
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including an insulative substrate, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a fourth electrically conductive layer. The first electrically conductive layer includes a gate line located on the insulative substrate, a common potential line and a first pad portion. The second electrically conductive layer includes a common electrode which is located on the insulative substrate and is put in contact with the common potential line, and a second pad portion stacked on the first pad portion. The fourth electrically conductive layer includes a pixel electrode in which a slit facing the common electrode is formed, and a third pad portion which is put in contact with the second pad portion.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: November 4, 2014
    Assignee: Japan Display Inc.
    Inventor: Shin Morita
  • Publication number: 20140125927
    Abstract: In a liquid crystal display apparatus, a pair of substrates has surfaces which is so arranged as to be opposed to each other. The one of the opposed surfaces has a display region in which pixels are arrayed in a matrix. A liquid crystal layer is held between the opposed surfaces of the pair of substrates. A first shading portion is arranged to surround the display region. A second shading portion is arranged between the first shading portion and an outer peripheral end of the one of the substrates, and is formed as discontinuous segments.
    Type: Application
    Filed: October 29, 2013
    Publication date: May 8, 2014
    Applicant: Japan Display Inc.
    Inventors: Masanobu YONEYAMA, Shin MORITA
  • Patent number: 8508707
    Abstract: In one embodiment, a liquid crystal display device includes a liquid crystal display panel having an active area for displaying images. The active area has pixels arranged in a matrix shape. The liquid crystal display device includes a first substrate having pixel electrodes of the pixels, a second substrate having a plurality of colored layers arranged side by side, and a counter electrode arranged on the colored layers facing the respective pixel electrodes. A seal element is arranged on a seal portion surrounding the active area and attaching the first substrate and the second substrate. A liquid crystal layer is held between the first substrate and the second substrate. The second substrate includes a convex portion arranged between the seal element and the active area, and the convex portion is formed of the same material as one of the plurality of colored layers.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: August 13, 2013
    Assignee: Japan Display Central Inc.
    Inventor: Shin Morita
  • Publication number: 20130194532
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including an insulative substrate, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a fourth electrically conductive layer. The first electrically conductive layer includes a gate line located on the insulative substrate, a common potential line and a first pad portion. The second electrically conductive layer includes a common electrode which is located on the insulative substrate and is put in contact with the common potential line, and a second pad portion stacked on the first pad portion. The fourth electrically conductive layer includes a pixel electrode in which a slit facing the common electrode is formed, and a third pad portion which is put in contact with the second pad portion.
    Type: Application
    Filed: January 23, 2013
    Publication date: August 1, 2013
    Inventor: Shin MORITA
  • Publication number: 20130155366
    Abstract: In one embodiment, a first wiring line is pulled out from an active area, and a short ring circuit is provided in a peripheral portion of the active area. A first electrode is formed in the same layer as the first wiring line. A semiconductor layer is formed on the first electrode. A portion of a second electrode faces the first electrode through an insulating layer and arranged on the semiconductor layer. A third electrode is arranged on the semiconductor layer in the same layer as the second electrode. The first electrode includes a cutout portion arranged under an edge of the second electrode.
    Type: Application
    Filed: December 6, 2012
    Publication date: June 20, 2013
    Inventor: Shin MORITA
  • Publication number: 20130027284
    Abstract: A liquid crystal display drive and control device for reducing the number of exclusive signal interconnections for connecting a host module to a liquid crystal display driver for a sub-display, and peripheral devices, respectively. The liquid crystal display drive and control device includes, over one semiconductor substrate, a host interface circuit, a drive circuit, and an output port, and is used for connection with the host module. The drive circuit generates a drive signal for driving a liquid crystal display on the basis of information inputted to the host interface circuit before outputting. The output port is capable of controlling a logic level of an output signal on the basis of the information inputted to the host interface circuit. The liquid crystal display drive and control device is capable of distribute signals to circuits controlled by level signals with determined logic levels.
    Type: Application
    Filed: July 31, 2012
    Publication date: January 31, 2013
    Inventors: Goro SAKAMAKI, Shin MORITA, Kazuhiko KANDA
  • Patent number: 8253683
    Abstract: It is intended to reduce the number of exclusive signal interconnections for connecting a host module to a liquid crystal display driver for a sub-display, and peripheral devices, respectively. A liquid crystal display drive and control device comprises, over one semiconductor substrate, a host interface circuit, a drive circuit, and an output port. The host interface circuit is used for connection with the host module. The drive circuit generates a drive signal for driving a liquid crystal display on the basis of information inputted to the host interface circuit before outputting. The output port is capable of controlling a logic level of an output signal on the basis of the information inputted to the host interface circuit.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: August 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Goro Sakamaki, Shin Morita, Kazuhiko Kanda
  • Patent number: 8248559
    Abstract: A liquid crystal display device having a non-rectangular display panel includes an active area which is defined by a peripheral shield layer. A plurality of pixels are formed in the active area in a matrix, and each pixel includes a plurality of sub-pixels to display colors different from each other. A part of the sub-pixels of peripheral pixels located in a peripheral region of the active area is covered with a peripheral shield layer. Shield elements are arranged in the sub-pixels which are not covered with the peripheral shield layer so that an effective display area of each of the sub-pixels of the peripheral pixel is substantially equal.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: August 21, 2012
    Assignee: Japan Display Central Inc.
    Inventor: Shin Morita