Patents by Inventor Shin Oyamada

Shin Oyamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9449997
    Abstract: An electro-optical device includes an element substrate main body, a first capacitance electrode that is arranged above the element substrate main body, and has a first metal film and a second metal film which is stacked onto the first metal film, a first protective insulating film that is arranged so as to cover a side wall of the first metal film, and expose at least a portion of a side wall of the second metal film, a dielectric film that is arranged throughout the side wall of the second metal film which is exposed from the first protective insulating film, and over the second metal film, and a second capacitance electrode that is arranged throughout the dielectric film on the second metal film, and over the dielectric film which is arranged in the side wall of the second metal film exposed from the first protective insulating film.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: September 20, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Takafumi Egami, Shin Oyamada
  • Publication number: 20160133655
    Abstract: An electro-optical device includes an element substrate main body, a first capacitance electrode that is arranged above the element substrate main body, and has a first metal film and a second metal film which is stacked onto the first metal film, a first protective insulating film that is arranged so as to cover a side wall of the first metal film, and expose at least a portion of a side wall of the second metal film, a dielectric film that is arranged throughout the side wall of the second metal film which is exposed from the first protective insulating film, and over the second metal film, and a second capacitance electrode that is arranged throughout the dielectric film on the second metal film, and over the dielectric film which is arranged in the side wall of the second metal film exposed from the first protective insulating film.
    Type: Application
    Filed: October 21, 2015
    Publication date: May 12, 2016
    Inventors: Takafumi Egami, Shin Oyamada
  • Patent number: 8823071
    Abstract: Disclosed is a pixel electrode which is electrically connected to a scanning line electrically connected to a gate electrode, a data line electrically connected to a data line side source and drain region, and a pixel electrode side source and drain region; and a capacitance element which has a first capacitance electrode which is electrically connected to a capacitance line, a second capacitance electrode which is provided to oppose the first capacitance electrode, and a dielectric layer which is interposed between the first capacitance electrode and the second capacitance electrode, where the first capacitance electrode is arranged to be covered with the dielectric layer and the second capacitance electrode between a layer where the transistor, the scanning line, and the data line are provided and a layer where the pixel electrode is provided.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: September 2, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Shin Oyamada
  • Publication number: 20130075799
    Abstract: Disclosed is a pixel electrode which is electrically connected to a scanning line electrically connected to a gate electrode, a data line electrically connected to a data line side source and drain region, and a pixel electrode side source and drain region; and a capacitance element which has a first capacitance electrode which is electrically connected to a capacitance line, a second capacitance electrode which is provided to oppose the first capacitance electrode, and a dielectric layer which is interposed between the first capacitance electrode and the second capacitance electrode, where the first capacitance electrode is arranged to be covered with the dielectric layer and the second capacitance electrode between a layer where the transistor, the scanning line, and the data line are provided and a layer where the pixel electrode is provided.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 28, 2013
    Applicant: Seiko Epson Corporation
    Inventor: Shin Oyamada
  • Patent number: 8059220
    Abstract: An electro-optical device includes a substrate, a pixel, a transistor, an inter-bedded insulation film, a storage capacitor, an underlying surface, a spacer insulation film, and a first dummy pattern. The spacer insulation film extends across a boundary between the main portion and an extension portion of the lower capacitor electrode of the capacitor and is in a non-overlapping condition with a part of the main portion in a plan view. The first dummy pattern is formed in the open region over the substrate, and is made of the same film as that of the spacer insulation film.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: November 15, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Shin Oyamada
  • Patent number: 7999897
    Abstract: An electro-optic device includes first electrodes that apply voltage to the liquid crystal layer in the pixel area and second electrodes that apply voltage to the liquid crystal layer in the peripheral area for shielding the peripheral area from light.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: August 16, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Shin Oyamada
  • Publication number: 20090244465
    Abstract: An electro-optic device includes first electrodes that apply voltage to the liquid crystal layer in the pixel area and second electrodes that apply voltage to the liquid crystal layer in the peripheral area for shielding the peripheral area from light.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Applicant: Seiko Epson Corporation
    Inventor: Shin Oyamada
  • Publication number: 20080198284
    Abstract: An electro-optical device includes a substrate, a pixel, a transistor, an inter-bedded insulation film, a storage capacitor, an underlying surface, a spacer insulation film, and a first dummy pattern. The spacer insulation film extends across a boundary between the main portion and an extension portion of the lower capacitor electrode of the capacitor and is in a non-overlapping condition with a part of the main portion in a plan view. The first dummy pattern is formed in the open region over the substrate, and is made of the same film as that of the spacer insulation film.
    Type: Application
    Filed: January 15, 2008
    Publication date: August 21, 2008
    Applicant: Seiko Epson Corporation
    Inventor: Shin Oyamada
  • Patent number: 7079198
    Abstract: The invention provides a wiring structure and a method for manufacturing the same for appropriately establishing an electrical connection between a first conductive layer constituting a part of a laminate and a conductive layer to be electrically connected thereto. The wiring structure can include, on a substrate, a capacitor provided with a first conductive layer, an insulating layer formed on the first conductive layer, and a second conductive layer formed on the insulating layer, a conductive layer electrically connected to the first conductive layer, and a relay layer located below the first conductive layer and the conductive layer, respectively to form a part of laminated structure. The first conductive layer and the conductive layer are electrically connected to each other through the relay layer.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: July 18, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Toshihide Miyazaki, Shin Oyamada
  • Publication number: 20040119899
    Abstract: The invention provides a wiring structure and a method for manufacturing the same for appropriately establishing an electrical connection between a first conductive layer constituting a part of a laminate and a conductive layer to be electrically connected thereto. The wiring structure can include, on a substrate, a capacitor provided with a first conductive layer, an insulating layer formed on the first conductive layer, and a second conductive layer formed on the insulating layer, a conductive layer electrically connected to the first conductive layer, and a relay layer located below the first conductive layer and the conductive layer, respectively to form a part of laminated structure. The first conductive layer and the conductive layer are electrically connected to each other through the relay layer.
    Type: Application
    Filed: October 2, 2003
    Publication date: June 24, 2004
    Applicant: Seiko Epson Corporation
    Inventors: Toshihide Miyazaki, Shin Oyamada