Abstract: A package structure includes a first carrier board provided with a through hole, at least a filling hole in communication with the through hole, a semiconductor chip received in the through hole, and a fastening member disposed in the filling hole and abutting against the semiconductor chip so as to secure the semiconductor chip in position, thereby preventing the semiconductor chip in the through hole from displacement under an external force.

Abstract: A package substrate structure includes: a substrate having a first surface and an opposing second surface and characterized by a plurality of wire-bonding pads provided on the first surface of the substrate, a plurality of ball-implanting pads provided on the second surface of the substrate, and at least a cavity formed to penetrate the first and second surfaces of the substrate; a metal board mounted on the second surface of the substrate and covering the cavity, wherein the metal board has a thickness greater than that of the ball-implanting pads and has an area greater than that of the cavity; and solder masks disposed on the first and second surfaces of the substrate respectively and having at least a solder-mask cavity corresponding in position to the cavity of the substrate, the solder masks further having a plurality of openings for exposing the wire-bonding pads, the ball-implanting pads and the metal board.

Abstract: A packaging substrate with an embedded photosensitive semiconductor chip and a method for fabricating the same are provided. The method includes the steps of: disposing the semiconductor chip in an through cavity of a core board with the photosensitive portion of the semiconductor chip being exposed from the through cavity; forming a first circuit layer on the core board at a side opposite to the photosensitive portion so as to electrically connect the electrode pads of the semiconductor chip; and forming a light-permeable layer on the core board at the same side with the photosensitive portion via an adhesion layer so as to allow light to penetrate through the light-permeable layer and reach the photosensitive portion of the semiconductor chip. When fabricated by the method, the packaging substrate dispenses with conductive wires and a surrounding dam and thus is efficiently downsized.

Abstract: A packaging substrate having a semiconductor chip embedded and a fabrication method thereof are provided. The method includes forming a semiconductor chip in a through cavity of a core board and exposing a photosensitive portion of the semiconductor chip from the through cavity; sequentially forming a first dielectric layer and a first circuit layer on the core board, the first circuit layer being electrically connected to the electrode pads of the semiconductor chip; forming a light-permeable window on the first dielectric layer to expose the photosensitive portion of the semiconductor chip and adhering a light-permeable layer onto the light-permeable window, thereby permitting light to penetrate through the light-permeable layer to reach the photosensitive portion. Therefore, when fabricated with the method, the packaging substrate dispenses with conductive wires and dams and thus can be downsized.

Abstract: A method of fabricating a printed circuit board having capacitance components, including: providing a core board having first and second surfaces with first and second wiring layers provided thereon, respectively, and electrically connected, a second dielectric layer, and a carrier board sequentially provided thereon with a second metal layer, a high dielectric material layer, and a third wiring layer with a plurality of first electrode plates thereon; laminating the core board, second dielectric layer, and carrier board to one another; removing the carrier board so as to expose the second metal layer; and patterning the second metal layer so as to form a fifth wiring layer having a plurality of second electrode plates and a plurality of second conductive vias electrically connected to the third wiring layer, thereby allowing the first electrode plates, high dielectric material layer, and second electrode plates together to form a plurality of capacitance components.

Abstract: A package structure includes a first carrier board provided with a through hole, at least a filling hole in communication with the through hole, a semiconductor chip received in the through hole, and a fastening member disposed in the filling hole and abutting against the semiconductor chip so as to secure the semiconductor chip in position, thereby preventing the semiconductor chip in the through hole from displacement under an external force.

Abstract: A method of fabricating a printed circuit board having capacitance components, including: providing a core board having first and second surfaces with first and second wiring layers provided thereon, respectively, and electrically connected, a second dielectric layer, and a carrier board sequentially provided thereon with a second metal layer, a high dielectric material layer, and a third wiring layer with a plurality of first electrode plates thereon; laminating the core board, second dielectric layer, and carrier board to one another; removing the carrier board so as to expose the second metal layer; and patterning the second metal layer so as to form a fifth wiring layer having a plurality of second electrode plates and a plurality of second conductive vias electrically connected to the third wiring layer, thereby allowing the first electrode plates, high dielectric material layer, and second electrode plates together to form a plurality of capacitance components.

Abstract: A printed circuit board having a semiconductor component embedded therein and a method of fabricating the same are proposed, including: providing a circuit board body having a through hole, a first surface and an opposing second surface both provided with a core circuit layer thereon; forming on the first surface a first dielectric layer with a dielectric-layer opening for exposing part of the first surface; forming a first circuit layer on the first dielectric layer, and forming first conductive vias in the first dielectric layer; fixing in position to the through hole a semiconductor chip having an active surface with electrode pads thereon; forming in the dielectric-layer opening a third dielectric layer for covering the active surface of the semiconductor chip; forming a third circuit layer on the third dielectric layer, and forming third conductive vias in the third dielectric layer. The printed circuit board thus fabricated is warpage-free.

Abstract: A package substrate structure includes: a substrate having a first surface and an opposing second surface and characterized by a plurality of wire-bonding pads provided on the first surface of the substrate, a plurality of ball-implanting pads provided on the second surface of the substrate, and at least a cavity formed to penetrate the first and second surfaces of the substrate; a metal board mounted on the second surface of the substrate and covering the cavity, wherein the metal board has a thickness greater than that of the ball-implanting pads and has an area greater than that of the cavity; and solder masks disposed on the first and second surfaces of the substrate respectively and having at least a solder-mask cavity corresponding in position to the cavity of the substrate, the solder masks further having a plurality of openings for exposing the wire-bonding pads, the ball-implanting pads and the metal board.

Abstract: A circuit board having a semiconductor chip embedded therein includes: a core board having opposing first and second surfaces and a through-hole; a semiconductor chip received in the through-hole and having a first active surface and an opposing second active surface, wherein first electrode pads comprising signal pads, power pads, and ground pads are provided on the first active surface; a first dielectric layer provided on the first surface of the core board and the first active surface of the semiconductor chip and configured to fill a gap between the through-hole and the semiconductor chip so as to secure the semiconductor chip in position to the through-hole; and a first circuit layer disposed in the first dielectric layer so as to be flush with the first dielectric layer, provided with first conductive vias disposed in the first dielectric layer, and electrically connected to the first electrode pads.

Abstract: A packaging substrate having a semiconductor chip embedded and a fabrication method thereof are provided. The method includes forming a semiconductor chip in a through cavity of a core board and exposing a photosensitive portion of the semiconductor chip from the through cavity; sequentially forming a first dielectric layer and a first circuit layer on the core board, the first circuit layer being electrically connected to the electrode pads of the semiconductor chip; forming a light-permeable window on the first dielectric layer to expose the photosensitive portion of the semiconductor chip and adhering a light-permeable layer onto the light-permeable window, thereby permitting light to penetrate through the light-permeable layer to reach the photosensitive portion. Therefore, when fabricated with the method, the packaging substrate dispenses with conductive wires and dams and thus can be downsized.