Patents by Inventor Shin-Sheng Lin

Shin-Sheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984378
    Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Chin-Hua Wang, Yu-Sheng Lin, Shin-Puu Jeng
  • Publication number: 20240153839
    Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Shen YEH, Po-Yao LIN, Chin-Hua WANG, Yu-Sheng LIN, Shin-Puu JENG
  • Publication number: 20240136246
    Abstract: A semiconductor device includes a package structure, a first heat spreader, and a second heat spreader. The first heat spreader is aside the package structure. The second heat spreader is in physical contact with the first heat spreader. The second heat spreader covers a top surface and sidewalls of the package structure. A material of the first heat spreader is different from a material of the second heat spreader.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Yu-Sheng Lin, Po-Chen Lai, Shin-Puu Jeng
  • Patent number: 11955455
    Abstract: A method includes bonding a first package component over a second package component. The second package component includes a plurality of dielectric layers, and a plurality of redistribution lines in the plurality of dielectric layers. The method further includes dispensing a stress absorber on the second package component, curing the stress absorber, and forming an encapsulant on the second package component and the stress absorber.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shin-Puu Jeng, Chien-Sheng Chen, Po-Yao Lin, Po-Chen Lai, Shu-Shen Yeh
  • Publication number: 20240087974
    Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20240088095
    Abstract: A method for forming a chip package structure. The method includes bonding first connectors over a front surface of a semiconductor wafer. The method also includes dicing the semiconductor wafer from a rear surface of the semiconductor wafer to form semiconductor dies and mounting first and second semiconductor dies in the semiconductor dies over a top surface of the interposer substrate. The method further forming an encapsulating layer over the top surface of the interposer substrate to cover the first semiconductor die and the second semiconductor die. A first sidewall of the first semiconductor die faces a second sidewall of the second semiconductor die, and upper portions of the first sidewall and the second sidewall have a tapered contour, to define a top die-to-die distance and a bottom die-to-die distance that is less than the top die-to-die distance.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Inventors: Chin-Hua WANG, Shin-Puu JENG, Po-Yao LIN, Po-Chen LAI, Shu-Shen YEH, Ming-Chih YEW, Yu-Sheng LIN
  • Publication number: 20240088063
    Abstract: A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Hua Wang, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 11915991
    Abstract: A semiconductor device includes a substrate, a package structure, a first heat spreader, and a second heat spreader. The package structure is disposed on the substrate. The first heat spreader is disposed on the substrate. The first heat spreader surrounds the package structure. The second heat spreader is disposed on the package structure. The second heat spreader is connected to the first heat spreader. A material of the first heat spreader is different from a material of the second heat spreader.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Yu-Sheng Lin, Po-Chen Lai, Shin-Puu Jeng
  • Patent number: D647753
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: November 1, 2011
    Inventor: Shin-Sheng Lin