Patents by Inventor Shin Shimizu

Shin Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11951448
    Abstract: An ultrafine bubble generation device including a gas-liquid mixed fluid generator, a rotary mixer, and a bubble shear filter. The rotary mixer is provided with a hollow part including a vertex inside, including an inflow hole, wherein a groove having a spiral shape is provided in an inner wall surface of the hollow part. The bubble shear filter is provided with a hollow part inside, including an inflow hole for introducing the fluid into the hollow part, wherein the hollow part is tubular, and a plurality of circular plates are arranged perpendicularly to a central axis of the hollow part, and an opening of a type 1 of circular plate and a pointed end portion of a type 2 of circular plate adjacent to the type 1 of circular plate are arranged to face each other, and connected with a pipeline.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: April 9, 2024
    Assignee: SHINBIOSIS CORPORATION
    Inventor: Shin Shimizu
  • Publication number: 20220305449
    Abstract: Provided is an ultrafine bubble generation device. A device 10 includes a rotary blower 31a, a rotary mixer 11, and a bubble shear filter 21. The rotary mixer 11 includes a hollow part 13 including a vertex X inside, an inflow hole 12 for introducing a fluid and a discharge hole 16. In an inner wall surface of the hollow part 13, a groove 14 having a spiral shape for the fluid introduced from the inflow hole 12 is provided, and the discharge hole 16 is provided away from the vertex X of the spiral shape on an axis of the spiral shape. The bubble shear filter 21 is provided with a hollow part inside, and includes an inflow hole 24 for introducing the fluid into the hollow part, and a discharge hole 26 for discharging the fluid.
    Type: Application
    Filed: March 22, 2021
    Publication date: September 29, 2022
    Inventor: Shin SHIMIZU
  • Publication number: 20220218765
    Abstract: The aim of the present invention is to provide an assistant agent for assisting introduction into a living body to be used to introduce an active substance into a living body, and a composition that includes the same. The present invention is directed to an assistant agent for assisting introduction into a living body or an assistant agent for a drug delivery system that is to be used to introduce (I)-(i) together with (I)-(ii) into a living body and that includes (II) and (II) below, or a composition containing an active substance that includes (I)-(i) to (II): (I)-(i) an active substance; (I)-(ii) an active substance protective agent; (II) a solvent; and (II) nano-sized or smaller (smaller than 1 micron) gas bubbles.
    Type: Application
    Filed: August 21, 2020
    Publication date: July 14, 2022
    Applicant: SHINBIOSIS CORPORATION
    Inventor: Shin Shimizu
  • Publication number: 20200171103
    Abstract: Provided is a composition containing microorganisms derived from a living body with which more rapid and more reliable engraftment effect is achieved irrespective of the administration method and the administration route. A composition containing microorganisms derived from a living body, comprising (I) to (III) below is provided. (I) At least one or more types of microorganisms. (II) A solvent. (III) Nano-sized or smaller gas bubbles.
    Type: Application
    Filed: February 27, 2019
    Publication date: June 4, 2020
    Applicant: CLINICAL RESEARCH OF FECAL MICROBIOTA TRANSPLANTATION JAPAN CORPORATION
    Inventor: Shin Shimizu
  • Patent number: 7141389
    Abstract: A chromosome DNA which codes for human hepatocyte growth factor, a recombinant expression vector capable of expressing the DNA, a transformant transformed with the expression vector and a method of producing recombinant human hepatocyte growth factor. The DNA and polypeptide of the present invention are expected to serve well for hepatocyte cultivation reagents, liver regeneration promoters, various researches, clinical diagnostic reagents and therapeutic drugs for liver diseases.
    Type: Grant
    Filed: August 17, 1994
    Date of Patent: November 28, 2006
    Inventors: Toshikazu Nakamura, Tatsuya Seki, Michio Hagiya, Manabu Shimonishi, Shin Shimizu
  • Patent number: 7129145
    Abstract: An information carrier in which an IC element formed integrally with a coil is mounted and which has an extended communication range and a method of manufacturing the same and a structure of the IC element appropriately suited for this sort of information carrier and a method of manufacturing the same. In the IC element, a conductor constituting the coil 3 is implemented in a multilayer structure including a metal-sputtered layer or alternatively a metal-evaporated layer 6 and a metal-plated layer 7. In the method of manufacturing the IC element, a precision electroforming method is employed as a means for forming the metal-plated layer 7. The information carrier is implemented in such a structure in which the IC element 1 is disposed at a center portion in a planar direction of a substrate 21.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: October 31, 2006
    Assignee: Hitachi Maxell, Ltd.
    Inventors: Satoshi Kawamura, Shin Shimizu
  • Patent number: 6910634
    Abstract: An information input/output unit according to the present invention includes a receiving cavity capable of accommodating therein two different species of noncontact information media having shapes differing from each other and an antenna part capable of performing communication by radio with the noncontact information media. The unit can communicate with a close-fit-type noncontact information medium without fail and preferably with predetermined degree of freedom for the shapes of the media.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: June 28, 2005
    Assignee: Hitachi Maxell, Ltd.
    Inventors: Fumiyuki Inose, Satoshi Kawamura, Shin Shimizu, Toshiyuki Kaneko
  • Publication number: 20050051872
    Abstract: An information carrier in which an IC element formed integrally with a coil is mounted and which has an extended communication range and a method of manufacturing the same and a structure of the IC element appropriately suited for this sort of information carrier and a method of manufacturing the same. In the IC element, a conductor constituting the coil 3 is implemented in a multilayer structure including a metal-sputtered layer or alternatively a metal-evaporated layer 6 and a metal-plated layer 7. In the method of manufacturing the IC element, a precision electroforming method is employed as a means for forming the metal-plated layer 7. The information carrier is implemented in such a structure in which the IC element 1 is disposed at a center portion in a planar direction of a substrate 21.
    Type: Application
    Filed: October 22, 2004
    Publication date: March 10, 2005
    Inventors: Satoshi Kawamura, Shin Shimizu
  • Publication number: 20040180637
    Abstract: A wireless communication IC exchanges data with an external device by receiving a radio signal having a given carrier frequency as power supply from the external device through an antenna. The wireless communication IC includes a capacitor for storing electric power, a diode placed between one end of the antenna and the capacitor, for supplying a charge current of the radio signal to the capacitor on a half cycle of the received radio signal; and a load modulation circuit. The load modulation circuit is driven by receiving power supply from the capacitor on another half cycle of the radio signal different from a half cycle for supplying a charge current to the capacitor.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 16, 2004
    Inventors: Nobuyuki Nagai, Shin Shimizu
  • Patent number: 5539701
    Abstract: A sense circuit for a DRAM has a sense amplifier provided for each pair of bit lines, a pair of re-storing lines for providing a re-storing voltage therebetween, and a re-storing switch connected between one pair of bit lines and the pair of re-storing lines. A pair of switching elements are provided for each pair of bit lines and are connected between its associated one pair of bit lines and sense amplifier so that the sense amplifier is electrically connected with and electrically disconnected from the one pair of bit lines when the pair of switching elements are conductive and non-conductive, respectively. The re-storing switch is responsive to a turn-off of the pair of switching elements to electrically connect its associated pair of bit lines with the pair of re-storing lines for supplying the re-storing voltage to the pair of bit lines.
    Type: Grant
    Filed: August 4, 1995
    Date of Patent: July 23, 1996
    Assignee: Nippon Steel Corporation
    Inventor: Shin Shimizu
  • Patent number: 5295174
    Abstract: A shift register comprises a plurality of latch circuits for latching time series signals inputted thereto, a multiplexer for selecting outputs of the latch circuits in sequence, and a clock control circuit for generating clocks used for controlling selection timings of the multiplexer, wherein the timing for selecting the output of a certain latch circuit is delayed with respect to the latch timing of the certain latch circuit by a predetermined timing. Accordingly, the number of elements constituting the shift register circuit is decreased and the power consumption is reduced.
    Type: Grant
    Filed: November 21, 1991
    Date of Patent: March 15, 1994
    Assignee: Nippon Steel Corporation
    Inventor: Shin Shimizu
  • Patent number: 5260594
    Abstract: A semiconductor device of the present invention capable of obtaining a proper output signal by absorbing an overshoot or an undershoot to reduce internal noises, comprises, a logical circuit portion including a transistor, a first diode disposed between a power line and an electrode of the logical circuit portion communicating with a power supply with its cathode being directed to the power line, and a second diode disposed between a ground line and an electrode of the logical circuit portion communicating with the ground with its anode being directed to the ground line. Another semiconductor device of the present invention includes a MOS transistor. An electrode portion of the device communicating with the power line and that of the device communicating with the ground line are formed by restricting impurity concentration of semiconductor portions in contact with the associated metal electrodes and have diode effect.
    Type: Grant
    Filed: November 21, 1991
    Date of Patent: November 9, 1993
    Assignee: Nippon Steel Corporation
    Inventor: Shin Shimizu
  • Patent number: 5241205
    Abstract: A semiconductor memory device is provided which includes a plurality of memory cells, each of which includes: an active region having an MOS transistor formed in the surface portion of a semiconductor substrate; a gate electrode formed on the substrate for the MOS transistor so as to divide the active region into a source-side active region with a storage contact and a drain-side active region with a bit contact, the portion of the active region which is positioned under the gate electrode functioning as a channel region for the MOS transistor; a first impurity-implanted region formed in a portion of the source-side active region so as to overlap with part of the storage contact and the gate electrode, the portion of the source-side active region which overlaps with the first impurity-implanted region functioning as a source region for the MOS transistor; and a second impurity-implanted region formed in a portion of the drain-side active region so as to overlap with at least one part of the bit contact and th
    Type: Grant
    Filed: September 29, 1992
    Date of Patent: August 31, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shin Shimizu, Katsuji Iguchi, Seizo Kakimoto, Tsukasa Doi
  • Patent number: 5239558
    Abstract: A pulse code modulation circuit comprises a circuit for converting an input analog signal into a digital signal; processing circuit including a plurality of memories, each of which is a memory whose contents can be freely rewritten, for storing different PCM coding rules for pulse-code modulation, respectively, and for performing on an input signal applied thereto pulse-code modulation according to a selected one of the PCM coding rules stored in the memories, switching circuit provided between the converting circuit and the processing circuit for applying the digital signal converted by the converting circuit as the input signal to a selected one of the memories in the processing circuit so that the converted digital signal is subjected to pulse-code modulation based on the selected one of the PCM coding rules; and a controlling circuit for controlling the switching circuit in accordance with a level of an output signal of the processing circuit so that the memory to which the digital signal is applied is se
    Type: Grant
    Filed: August 29, 1991
    Date of Patent: August 24, 1993
    Assignee: Nippon Steel Corporation
    Inventor: Shin Shimizu
  • Patent number: 5220306
    Abstract: A digital value comparator circuit for comparing in magnitude first and second digital values, each represented by n-bit binary signal (n is an integer larger than 1) is disclosed to comprise first and second signal converters for receiving the first and second digital signals, each converter including a parallel connection of first to n-th FETs with powers, respectively, m.sup.0, m.sup.1, m.sup.2, m.sup.3, . . . , m.sup.n-1 times (m is an integer larger than 1) of a predetermined power and having respective gates connected to the n bits of the supplied digital signal sequentially from its least significant bit, and an adder circuit for generating an output signal indicative of a sum of currents flowing through drain-source circuits of the first to n-th FETs, and a decision circuit connected to the first and second signal converters for comparing the output signals thereof and generating a signal representing the result of comparison.
    Type: Grant
    Filed: August 29, 1991
    Date of Patent: June 15, 1993
    Assignee: Nippon Steel Corporation
    Inventor: Shin Shimizu
  • Patent number: 5110741
    Abstract: An aeration apparatus for the culture of mammalian cells comprises a plurality of bundles composed of thin-walled narrow tubes made of gas permeable material, a first head for introducing a gas to the bundles through a gas connector and a second head for removing gas from the bundles through a gas connector, both the first head and second head providing flow communication to and from the bundles, respectively, the apparatus being positioned in a culturing vessel so that the bundles are in a slackened state.
    Type: Grant
    Filed: May 9, 1990
    Date of Patent: May 5, 1992
    Assignee: Toyo Boseki Kabushiki Kaisha
    Inventors: Kiyomoto Ohi, Shin Shimizu
  • Patent number: 4818321
    Abstract: A process for the preparation of a laminated material including the steps of cutting open an annual lignocellulosic stalk in the fiber direction with a knife; flattening the lignocellulosic stalk by means of a roller press to form a compressed stalk, one face of which consists of its epidermis; arrangement a plurality of the compressed stalks in parallel with each other to form a sheet; coating the sheet with a resin adhesive; stacking a plurality of the sheets coated with the adhesive; and then bonding with heat and pressure by means of a hot press. The laminated material in the form of boards has an equal to or higher flexural strength than conventional plywood or also has excellent sound absorbing and heat insulating properties in comparison with conventional particleboard or fiberboard.
    Type: Grant
    Filed: May 29, 1987
    Date of Patent: April 4, 1989
    Assignee: Koyo Sangyo Co., Ltd.
    Inventors: Shin Shimizu, Tsugane Tanaka, Osamu Ohara, Taisei Inoue