Abstract: A method of fabricating an insulating layer starts by forming at least one gate, having at least a conductive layer and a cap oxide layer, on a surface of a semiconductor substrate. An insulating layer thicker than a height of the gate on the semiconductor substrate is then formed to follow the topography of the gate to produce an uneven surface. A planar layer is then formed on the insulating layer to form an approximately flat surface for the semiconductor substrate. By performing a planarization process, a portion of the planar layer is removed down to the surface of the insulating layer. A first etching process is then performed to completely remove the remaining portions of the planar layer. Finally, a second etching process is performed to remove the insulating layer and the cap oxide layer atop the gate, so that the remaining insulating layer outside the gate has a protrusive surface after the second etching process.

Abstract: An operating method of a semiconductor etcher includes three steps. The first step is to provide a first power for shortening a warm-up time of the etcher. The second step is to provide a second power, which is lower than the first power, to perform an etching process. The third step is to provide a third power, which is between the first and second power, for cleaning the etcher.

Abstract: A method of fabricating an insulating layer starts by forming at least one gate, having at least a conductive layer and a cap oxide layer, on a surface of a semiconductor substrate. An insulating layer thicker than a height of the gate on the semiconductor substrate is then formed to follow the topography of the gate to produce an uneven surface. A planar layer is then formed on the insulating layer to form an approximately flat surface for the semiconductor substrate. By performing a planarization process, a portion of the planar layer is removed down to the surface of the insulating layer. A first etching process is then performed to completely remove the remaining portions of the planar layer. Finally, a second etching process is performed to remove the insulating layer and the cap oxide layer atop the gate, so that the remaining insulating layer outside the gate has a protrusive surface after the second etching process.

Abstract: First of all, a semiconductor substrate that has a memory array and a periphery region thereon is provided. Then a barrier layer is formed on the gate devices of the memory array and the periphery region and on the semiconductor substrate. Next, an organic layer is formed on the barrier layer. Afterward, removing the organic layer and the barrier layer until exposing the gate devices of the memory array and the periphery region. The remainder of the organic layer is then removed by way of using an ashing process. Subsequently, a photoresist layer is formed on the memory array, and the barrier layer of the periphery region is etched until exposing the surface of the semiconductor substrate. Finally, performing a silicide process after removing the photoresist layer, so as to individually form a salicide layer on the gate devices of the memory array and the periphery region, and on the semiconductor substrate of the periphery region.

Abstract: A method of etching a metallic layer having an anti-reflection layer thereon. The method includes performing a first etching operation using a fixed set of processing parameters to etch the anti-reflection layer and remove a specified thickness of the metallic layer. Thereafter, a second etching operation is conducted to etch the remaining metallic layer.

Abstract: The present invention provides an inspection method including the following steps. First, the wafer, after contact etching, will carry out a SEM's (scanning electron microscope) scanning electron beam, wherein the amplification factor is about 500 to 5000 and the scanning time is about 5 to 10 second. The surface of silicon, silicon oxide, or other insulating materials may display different color after processing electron beam scanning due to the different material charging effect. Therefore, the etching result may be determined by comparing the color shown on the SEM photograph.

Abstract: An apparatus for cleaning a semiconductor wafer is disclosed to substantially improve the efficiency of the cleaning process, and reduce the quantity of cleaning solvent used. The apparatus includes a rotating table for supporting the wafer, a rotation device to rotate the rotation table, a movable or stationary curved-slab for scrubbing the surface of the wafer efficiently, a cleaning nozzle for applying a cleaning solvent or stripper on the surface of the wafer, and a resistance wall for preventing the cleaning solvent spun out from the wafer to pollute the cleaning room.