Patents by Inventor Shin-Yuan Tzou

Shin-Yuan Tzou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5671390
    Abstract: A method and means are disclosed in a Log Structure Array (LSA) storage subsystem for managing said subsystem without a need for an access to a complete LSA directory in a RAM. This object is achieved by maintaining (1) a subset of the LSA directory (referred to as LSA sub-directory) in a RAM where the LSA sub-directory comprises the logical track address of a predetermined number of most recently accessed logical tracks; (2) a journal of changes to the LSA directory which is maintained on a different power boundary than the LSA directory power boundary; and, (3) an array of bit maps, one bit map per segment which is used for fast garbage collection thus eliminating the need for having an access to a complete LSA directory in a RAM during garbage collection.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: September 23, 1997
    Assignee: International Business Machines Corporation
    Inventors: James Thomas Brady, Alden B. Johnson, John Chi-Shing Lui, Jaishankar Moothedath Menon, Shin-Yuan Tzou
  • Patent number: 5577211
    Abstract: A computing system includes plural nodes that are connected by a communications network. Each node comprises a communications interface that enables an exchange of messages with other nodes. A ready queue is maintained in a node and includes plural message entries, each message entry indicating an output message control data structure. The node further includes memory for storing plural output message control data structures, each including one or more chained further monrtol data structures that define data comprising a message or a portion of a message that is to be dispatched. Control data structures that are chained from an output messsage control data structure exhibit a sequence dependincy. A processor is controlled by the ready queue and enables dispatch of portions of the message designated by an output message control data structure and associated further control structures.
    Type: Grant
    Filed: May 11, 1994
    Date of Patent: November 19, 1996
    Assignee: IBM Corporation
    Inventors: Narasimhareddy L. Annapareddy, James T. Brady, Damon W. Finney, Richard F. Freitas, Michael H. Hartung, Michael A. Ko, Noah R. Mendelsohn, Jaishankar M. Menon, David R. Nowlen, Shin-Yuan Tzou