Patents by Inventor Shinetsu Miura

Shinetsu Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6052173
    Abstract: A device for exposure of the peripheral area of a wafer with a small shape and at low costs in which, using a device for stepped exposure of the peripheral area of a wafer, the peripheral area of a wafer can be exposed in a ring shape. A wafer to which resist has been applied is placed on a rotary support and rotated once. The seated state of the wafer and a singular orienting shape such as an Ori-Fla or the like are determined. Based on this information, the wafer is positioned in a given position. Then, the rotary support is moved by means of an X-Y support and exposure is performed. If the coordinates of the center of rotation (X.THETA., Y.THETA.) are taken accurately a ring shape is approached in practice (if, for example, .THETA.=0.1.degree. and for a polygon with 3600 corners a circle is approached), there is no problem. Two exposure devices are not necessary, specifically one device for stepped exposure of the peripheral area of a wafer and one device for ring-shaped exposure of the peripheral area.
    Type: Grant
    Filed: November 27, 1998
    Date of Patent: April 18, 2000
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventors: Shinetsu Miura, Yoshiki Mimura
  • Patent number: 5923990
    Abstract: To increase operating efficiency and prevent operating errors, such as adjustment errors and the like, by automatic computation of the distance between the workpiece alignment marks, according to the invention, workpiece alignment marks located at two locations on a workpiece are subjected to image recording by alignment units, their positions are stored as first positions, then by rotation of the workpiece by a preset very small angle, the workpiece alignment marks located at two locations on the workpiece are determined again, and their positions are stored as second positions. Based on the data of the first and second positions, the distance between the workpiece alignment marks is determined. Then, based on the distance data, the angular offset of the workpiece is determined. After correction of this angular offset, the mask and/or the workpiece is/are moved such that the images of the mask alignment marks and the workpiece alignment marks come to rest on top of one another.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: July 13, 1999
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventor: Shinetsu Miura
  • Patent number: 5880816
    Abstract: To effect exposure of the peripheral area of a wafer to remove an unnecessary resist with a step shape in a development process with high precision and ease, even if the position has errors, in which a circuit pattern is formed on a semiconductor wafer in a preceding process, according to the invention, before exposing the unnecessary resist on a wafer outside of the area on which a pattern is formed, the position of a singular shaped area, such as an "orientation flat" or the like is determined by a unit for determining the peripheral edge area of the wafer, and the rotating carrier is driven and the wafer is rotated until the singular shaped area is positioned in a predetermined position. Furthermore, according to the invention, a unit for determining the alignment marks computes and stores the positions of predetermined alignment marks, by which positional errors in the location in which the circuit pattern is formed are corrected.
    Type: Grant
    Filed: October 2, 1996
    Date of Patent: March 9, 1999
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventors: Yoshiki Mimura, Takeshi Minobe, Shinetsu Miura
  • Patent number: 5168021
    Abstract: A method for exposing a peripheral part of a wafer according to the present invention is to expose the peripheral part, taking account of a correcting angle determined by calculating the amount of misalignment between a center of a wafer and a rotational center for the wafer from the amount of displacement of a sensor for detecting a peripheral edge. Therefore, any wafer-centering motion and mechanism are not required, and this method is higher in precision of exposing position.
    Type: Grant
    Filed: August 22, 1990
    Date of Patent: December 1, 1992
    Assignee: Ushio Denki
    Inventors: Tetsuji Arai, Shinji Suzuki, Nobutaka Kajiura, Shinetsu Miura, Kazumoto Tochihara