Patents by Inventor Shing Chou Pi

Shing Chou Pi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4371933
    Abstract: An improved method and apparatus are disclosed for generating circular arcs of any arc length greater than zero up to and including a full circle of 360 degrees. The method and apparatus can locate nonsymmetrical closest points for noninteger radius and arc center values. The method and apparatus is capable of generating the incremental move commands for drawing an arc either in the clockwise or counter clockwise direction which is a distinct advantage when used to drive a pen type electromechanical plotter. By dividing the generation of a 360 degree arc into eight octants, only two of the original eight directions need to be considered as candidate directions toward the next integer display matrix value to be displayed. The method and apparatus employ a novel initialization which provides a simple stopping test for any circular arc of arbitrary length and direction. Only simple addition and sign testing is used to display the circular arc.
    Type: Grant
    Filed: October 6, 1980
    Date of Patent: February 1, 1983
    Assignee: International Business Machines Corporation
    Inventors: Jack E. Bresenham, Donald G. Grice, Shing-Chou Pi
  • Patent number: 4084152
    Abstract: This specification describes arrays for performing logic functions. In these arrays input variables are placed on a series of parallel input lines that intersect a number of parallel output lines in a grid of intersections. Field effect devices at these intersections have their gate terminals connected to one of the input lines and their source terminal connected to one of the output lines and through a load device to a source of potential. The drain terminals of these devices are either unconnected, connected directly to ground or connected to ground through one of two switching devices. The devices with unconnected drains are inoperative. The devices with their drains connected directly to ground are operative at all times. While the devices connected to ground through one of the switches are operative only when the switch is closed. The array can be time shared by two different logic functions by having one or the other of the switches off at any given time.
    Type: Grant
    Filed: April 4, 1977
    Date of Patent: April 11, 1978
    Assignee: International Business Machines Corporation
    Inventors: Gerald Bernard Long, Ralph Charles Mitchell, Shing Chou Pi
  • Patent number: 3991408
    Abstract: A self-sequenced read only memory is shown wherein each word line contains dynamic logic circuits for energizing a next word line after the fixed time delay provided by the dynamic logic circuits. Self-sequencing inverters are physically placed within the array area thereby increasing reliability and reducing circuit wiring. When used as a microprogram control storage, the memory is divided into a plurality of self-sequenced control routines. When a certain function is to be performed, the first word line of the control routine for performing the selected function is energized. Since each word line includes a one cycle delay and is wired to the next sequential word line, no separate timing or address control is required to address word lines within a selected control routine. Once a control routine is energized, sequential microinstructions will be automatically fetched including branch and branch-on condition instructions.
    Type: Grant
    Filed: November 27, 1974
    Date of Patent: November 9, 1976
    Assignee: International Business Machines Corporation
    Inventors: Arthur Wilbert Holmes, Jr., Gerald Bernard Long, Richard Charles Paddock, Shing Chou Pi, Donald Walter Price