Patents by Inventor Shingetsu Yamada

Shingetsu Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8742432
    Abstract: The invention provides a metal substrate and a light source device ensuring that a semiconductor chip working as a light source can be firmly joined by using a metal joining material, such that heat generated in the mounted semiconductor chip can be efficiently dissipated through a metal plate. The metal substrate includes a heat dissipating metal plate made of a metal except for Au, an insulating resin-made white film stacked on a part of the heat dissipating metal plate, and a light source mounting surface-forming layer stacked on another part of the heat dissipating metal plate. The metal substrate is such that the light source mounting surface-forming layer is a metal layer directly contacting the heat dissipating metal plate, and the light source mounting surface is a surface of an Au layer which is the outermost layer of the light source mounting surface-forming layer.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: June 3, 2014
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Yoshihito Sato, Nobuhiro Arai, Jun Matsui, Shingetsu Yamada, Shuuji Suzuki
  • Publication number: 20120138990
    Abstract: The invention provides a metal substrate and a light source device ensuring that a semiconductor chip working as a light source can be firmly joined by using a metal joining material, such that heat generated in the mounted semiconductor chip can be efficiently dissipated through a metal plate. The metal substrate includes a heat dissipating metal plate made of a metal except for Au, an insulating resin-made white film stacked on a part of the heat dissipating metal plate, and a light source mounting surface-forming layer stacked on another part of the heat dissipating metal plate. The metal substrate is such that the light source mounting surface-forming layer is a metal layer directly contacting the heat dissipating metal plate, and the light source mounting surface is a surface of an Au layer which is the outermost layer of the light source mounting surface-forming layer.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yoshihito SATO, Nobuhiro Arai, Jun Matsui, Shingetsu Yamada, Shuuji Suzuki
  • Patent number: 8169129
    Abstract: The present invention provides a white film comprising a thermoplastic resin composition containing 25-100 parts by mass of an inorganic filler based on 100 parts by mass of a thermoplastic resin, wherein the average reflectance at a wavelength of 400-800 nm is 70% or more, the average linear expansion coefficient in the machine direction and the transverse direction is 35×10?6/° C. or less, and the decreasing rate in reflectance at a wavelength of 470 nm after thermal treatment at 200° C. for 4 hours is 10% or less; and the invention provides a metal laminated body. These exhibit high thermal resistance, high reflectance within visual light range, and small decrease in reflectance under a high heat load environment, but also be applicable for a large sized printed circuit boards for mounting LEDs.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: May 1, 2012
    Assignee: Mitsubishi Plastics, Inc.
    Inventors: Jun Matsui, Shingetsu Yamada, Shuuji Suzuki
  • Patent number: 8044304
    Abstract: A multilayer printed circuit board is characterized in that circuit boards 1 and 2 and a circuit board 3 are laminated alternately to form a multilayer body using a simultaneous lamination method, the circuit boards 1 and 2 including a film-, thin plate-, or sheet-like insulating substrate 11 made of a thermosetting resin containing any one of epoxy resin, bismaleimide/triazine resin, and allylic polyphenylene ether resin as a major component, the circuit board 3 including a film-, thin plate-, or sheet-like insulating substrate 21 made of a thermoplastic resin containing a polyaryl ketone resin and amorphous polyether imide resin having a crystal-fusing peak temperature of 260° C. or more.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: October 25, 2011
    Assignee: Mitsubishi Plastics, Inc.
    Inventor: Shingetsu Yamada
  • Publication number: 20110042124
    Abstract: The present invention provides a multilayer wiring substrate comprising: a plurality of wiring substrate laminated each other; and a cavity portion. In the multilayer wiring substrate, a wiring substrate 1 being arranged along the bottom face of the cavity portion and a wiring substrate 2 being arranged at an upper layer side of the wiring substrate 1, the wiring substrate 1 and/or the wiring substrate 2 respectively comprising an insulating base material having a predetermined properties, the wiring substrate 2 being provided with a cavity hole. Thus, it is possible to provide a multilayer wiring substrate having a cavity portion and even a function of reflector.
    Type: Application
    Filed: December 3, 2008
    Publication date: February 24, 2011
    Applicant: Mitsubishi Plastics, Inc.
    Inventors: Jun Matsui, Shingetsu Yamada
  • Publication number: 20100301725
    Abstract: The present invention provides a white film comprising a thermoplastic resin composition containing 25-100 parts by mass of an inorganic filler based on 100 parts by mass of a thermoplastic resin, wherein the average reflectance at a wavelength of 400-800 nm is 70% or more, the average linear expansion coefficient in the machine direction and the transverse direction is 35×10?6/° C. or less, and the decreasing rate in reflectance at a wavelength of 470 nm after thermal treatment at 200° C. for 4 hours is 10% or less; and the invention provides a metal laminated body. These exhibit high thermal resistance, high reflectance within visual light range, and small decrease in reflectance under a high heat load environment, but also be applicable for a large sized printed circuit boards for mounting LEDs.
    Type: Application
    Filed: November 28, 2008
    Publication date: December 2, 2010
    Inventors: Jun Matsui, Shingetsu Yamada, Shuuji Suzuki
  • Publication number: 20090020319
    Abstract: A multilayer printed circuit board is characterized in that circuit boards 1 and 2 and a circuit board 3 are laminated alternately to form a multilayer body using a simultaneous lamination method, the circuit boards 1 and 2 including a film-, thin plate-, or sheet-like insulating substrate 11 made of a thermosetting resin containing any one of epoxy resin, bismaleimide/triazine resin, and allylic polyphenylene ether resin as a major component, the circuit board 3 including a film-, thin plate-, or sheet-like insulating substrate 21 made of a thermoplastic resin containing a polyaryl ketone resin and amorphous polyether imide resin having a crystal-fusing peak temperature of 260° C. or more.
    Type: Application
    Filed: January 24, 2006
    Publication date: January 22, 2009
    Inventor: Shingetsu Yamada
  • Publication number: 20080116611
    Abstract: A multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring. can be ideally applied to low volume high mix manufacturing configurations, and also has little impact on the environment is provided, together with a semiconductor device mounting board using such a multilayer wiring board, and a method of manufacturing such a multilayer wiring board. In the multilayer wiring board, grooves for forming a wiring circuit and via holes are formed in an insulating substrate formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 22, 2008
    Applicants: Sony Corporation, Mitsubishi Plastics, Inc.
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Patent number: 7334324
    Abstract: A method of manufacturing a, in order to accommodate the words range and to clarify the multilayer wiring board, grooves for forming a wiring circuit and via holes are formed in an insulating substrate formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C. and an amorphous polyetherimide resin as the primary constituents, a metallic foil is embedded within the grooves so that the surface of the foil protrudes to the surface of the insulating substrate, and a conductive material formed by curing a conductive paste is used for filling the via holes.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: February 26, 2008
    Assignees: Sony Corporation, Mitsubishi Plastics, Inc.
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Patent number: 7022399
    Abstract: The present invention provides a semiconductor device integrated multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, thereby enabling the production of high density, ultra small three dimensional mounting modules and the like, can also be ideally applied to low volume high mix manufacturing configurations, and has little impact on the environment, and also provides a method of manufacturing such a semiconductor device integrated multilayer wiring board. In the semiconductor device integrated multilayer wiring board, a wiring substrate is formed by embedding conductive wiring within an insulating substrate, formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: April 4, 2006
    Assignees: Sony Corporation, Mitsubishi Plastics, Inc.
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Publication number: 20050025944
    Abstract: A multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, can be ideally applied to low volume high mix manufacturing configurations, and also has little impact on the environment is provided, together with a semiconductor device mounting board using such a multilayer wiring board, and a method of manufacturing such a multilayer wiring board. In the multilayer wiring board, grooves for forming a wiring circuit and via holes are formed in an insulating substrate formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.
    Type: Application
    Filed: August 24, 2004
    Publication date: February 3, 2005
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Patent number: 6824884
    Abstract: A heat resistant resin composition comprising 70 to 30 wt % of a crystalline polyarylketone resin having a peak crystalline melting temperature of 260° C. or higher and 30 to 70 wt % of a noncrystalline polyetherimide resin, wherein said composition has at least 2 peaks of loss tangent (tan &dgr;) between 140° C. and 250° C., determined by dynamic mechanical measurement.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: November 30, 2004
    Assignee: Mitsubishi Plastics, Inc.
    Inventors: Kouichirou Taniguchi, Shingetsu Yamada
  • Patent number: 6797367
    Abstract: A multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, can be ideally applied to low volume high mix manufacturing configurations, and also has little impact on the environment is provided, together with a semiconductor device mounting board using such a multilayer wiring board, and a method of manufacturing such a multilayer wiring board. In the multilayer wiring board, grooves for forming a wiring circuit and via holes are formed in an insulating substrate formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: September 28, 2004
    Assignees: Sony Corporation, Mitsubishi Plastics, Inc.
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Publication number: 20040096678
    Abstract: A film of a resin composition comprising total 100 parts by weight of a crystalline polyarylketone resin (A) and a noncrystalline polyetherimide resin (B), and 5 to 50 parts by weight of a filler, said film satisfies the following relation
    Type: Application
    Filed: July 22, 2003
    Publication date: May 20, 2004
    Inventors: Kouichirou Taniguchi, Shingetsu Yamada
  • Publication number: 20030180510
    Abstract: A multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, can be ideally applied to low volume high mix manufacturing configurations, and also has little impact on the environment is provided, together with a semiconductor device mounting board using such a multilayer wiring board, and a method of manufacturing such a multilayer wiring board. In the multilayer wiring board, grooves for forming a wiring circuit and via holes are formed in an insulating substrate formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.
    Type: Application
    Filed: February 3, 2003
    Publication date: September 25, 2003
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Publication number: 20030178726
    Abstract: The present invention provides a semiconductor device integrated multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, thereby enabling the production of high density, ultra small three dimensional mounting modules and the like, can also be ideally applied to low volume high mix manufacturing configurations, and has little impact on the environment, and also provides a method of manufacturing such a semiconductor device integrated multilayer wiring board. In the semiconductor device integrated multilayer wiring board, a wiring substrate is formed by embedding conductive wiring within an insulating substrate, formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.
    Type: Application
    Filed: February 3, 2003
    Publication date: September 25, 2003
    Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
  • Patent number: 6499217
    Abstract: An efficient method of manufacturing a three-dimensional printed wiring board is provided in which a conductor foil can be reliably heat-fused to the board at a relatively low temperature and the three-dimensional shape such as convex and concave of a mold can be reproduced precisely with no residual stress. The method comprises the steps of providing a filmy insulator comprising a thermoplastic resin composition containing 65-35 wt % of a polyaryl ketone resin having a crystal-melting peak temperature of 260° C. or over, and 35-65 wt % of an amorphous polyetherimide resin, and having a glass transition temperature as measured when the temperature is increased for differential scanning calorie measurement of 150-230° C.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: December 31, 2002
    Assignees: Mitsubishi Plastics Inc., Denso Corporation
    Inventors: Shingetsu Yamada, Jun Takagi, Koichiro Taniguchi, Kaoru Nomoto, Toshihiro Miyake, Kazuya Sanada, Makoto Totani
  • Patent number: 6228467
    Abstract: A base plate for a printed circuit board, having a conductive foil heat-bonded to at least one side of a film insulator which comprises from 65 to 35 wt % of a polyarylketone resin and from 35 to 65 wt % of a non-crystalline polyether imide resin and of which the glass transition temperature is from 150 to 230° C. and the peak temperature of crystal fusion is at least 260° C., as measured when the temperature is raised in the differential scanning calorimetry, if necessary after forming a through-hole and filling a conductive paste therein, and of which, after the heat bonding, the heat of crystal fusion &Dgr;Hm and the heat of crystallization &Dgr;Hc generated by crystallization during the temperature rise, as measured when the temperature is raised by the differential scanning calorimetry, satisfy the following relation: [(&Dgr;Hm−&Dgr;Hc)/&Dgr;Hm]≦0.5.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: May 8, 2001
    Assignees: Mitsubishi Plastics, Inc., Denso Corporation
    Inventors: Kouichirou Taniguchi, Jun Takagi, Hideo Yamano, Shingetsu Yamada, Kouji Kondo, Kaoru Nomoto
  • Patent number: 5441804
    Abstract: A magneto-optical recording medium has on the substrate a recording layer made of a multi-layered metallic thin film comprising a first unit layer and a second unit layer. The first unit layer is composed of (Fe.sub.x Co.sub.1-x).sub.1-y M.sub.y where M represents at least one metal selected from the group consisting of Pt, Pd and Au, 0.5.ltoreq..times..ltoreq.1.0, and 0.01.ltoreq.y.ltoreq.0.1. The second unit layer is composed of a% least one metal selected from the group consisting of Nd, Dy, Gd and Tb. The first and second unit layers are superimposed alternately one on another.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: August 15, 1995
    Assignee: Mitsubishi Plastics Industries Limited
    Inventors: Toshiyuki Akitake, Shingetsu Yamada