Patents by Inventor Shingo Hashiguchi

Shingo Hashiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10673332
    Abstract: A switching regulator control circuit, having: a slope circuit 3 for generating a slope voltage VSLP on the basis of a clock signal CLK of a prescribed frequency; an error amplifier 1 for generating an error signal Vc corresponding to the difference between a reference voltage VREF and a voltage VFB corresponding to the output voltage of a switching regulator; a comparator 4 for comparing the error signal Vc and the slope voltage VSLP; and an RS flip-flop 6 set on the basis of the clock signal CLK and reset by a signal outputted by the comparator 4. The timing at which the RS flip-flop 6 is set is delayed with respect to the timing at which the sloping of the slope voltage VSLP is started.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: June 2, 2020
    Assignee: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Tetsuo Tateishi
  • Patent number: 10667383
    Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 26, 2020
    Assignee: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Shoichi Harada
  • Publication number: 20200022253
    Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.
    Type: Application
    Filed: September 24, 2019
    Publication date: January 16, 2020
    Applicant: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Shoichi HARADA
  • Patent number: 10470295
    Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: November 5, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Shoichi Harada
  • Publication number: 20190319536
    Abstract: A switching regulator control circuit, having: a slope circuit 3 for generating a slope voltage VSLP on the basis of a clock signal CLK of a prescribed frequency; an error amplifier 1 for generating an error signal Vc corresponding to the difference between a reference voltage VREF and a voltage VFB corresponding to the output voltage of a switching regulator; a comparator 4 for comparing the error signal Vc and the slope voltage VSLP; and an RS flip-flop 6 set on the basis of the clock signal CLK and reset by a signal outputted by the comparator 4. The timing at which the RS flip-flop 6 is set is delayed with respect to the timing at which the sloping of the slope voltage VSLP is started.
    Type: Application
    Filed: August 2, 2017
    Publication date: October 17, 2019
    Applicant: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Tetsuo Tateishi
  • Publication number: 20190278314
    Abstract: There is provided a linear regulator including: a first output transistor connected between a first input terminal to which a first input voltage is applied and an output terminal from which an output voltage is outputted; a second output transistor connected between a second input terminal to which a second input voltage is applied and the output terminal; and a control circuit configured to control the first output transistor when the second input voltage of a predetermined range is not supplied to the second input terminal, and to control the second output transistor when the first input voltage of the predetermined range is not supplied to the first input terminal.
    Type: Application
    Filed: March 5, 2019
    Publication date: September 12, 2019
    Applicant: Rohm Co., Ltd.
    Inventor: Shingo Hashiguchi
  • Patent number: 10355589
    Abstract: In a switching regulator, a first switch and a second switch are turned ON and OFF complementarily according to an output voltage. In a step-up/down mode, a third switch and a fourth switch are turned ON and OFF complementarily while the ON-duty D of the third switch is kept fixed.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: July 16, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Tetsuo Tateishi, Yuhei Yamaguchi, Shingo Hashiguchi, Kiyotaka Umemoto
  • Publication number: 20190214911
    Abstract: Provided is an integrated circuit package which complementarily switches on/off a MOS transistor Q1 (first switch) and MOS transistor Q2 (second switch) in accordance with an output voltage Vout, and which externally outputs a pulse signal having a fixed on-duty D during a step-up/step-down mode. The integrated circuit package has a determination unit 61 for determining the impedance of an external component connected to an external pin P5 that outputs the pulse signal to the exterior during the step-up/step-down mode, and determining whether the external component is a third switch on the basis of the impedance determination result.
    Type: Application
    Filed: August 2, 2017
    Publication date: July 11, 2019
    Applicant: ROHM CO., LTD.
    Inventors: Shingo Hashiguchi, Tetsuo Tateishi
  • Patent number: 10320292
    Abstract: A phase compensation circuit, being for compensating phase of a first voltage inputted to a PWM comparator of a DC/DC converter having a sleep mode, includes: a phase compensation resistor part including a resistor; a phase compensation capacitor part including a plurality of capacitors; and a switch group arranged to change over the capacitors, in the sleep mode, to a first connection state in which at least one of the capacitors is charged with a first bias voltage and to change over the capacitors, at cancellation of the sleep mode, to a second connection state in which the first voltage is set to a desired initial value.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: June 11, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Shun Fukushima, Shingo Hashiguchi, Tetsuo Tateishi
  • Publication number: 20180263110
    Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.
    Type: Application
    Filed: March 6, 2018
    Publication date: September 13, 2018
    Inventors: Shingo Hashiguchi, Shoichi HARADA
  • Publication number: 20180183338
    Abstract: A phase compensation circuit, being for compensating phase of a first voltage inputted to a PWM comparator of a DC/DC converter having a sleep mode, includes: a phase compensation resistor part including a resistor; a phase compensation capacitor part including a plurality of capacitors; and a switch group arranged to change over the capacitors, in the sleep mode, to a first connection state in which at least one of the capacitors is charged with a first bias voltage and to change over the capacitors, at cancellation of the sleep mode, to a second connection state in which the first voltage is set to a desired initial value.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 28, 2018
    Inventors: Shun FUKUSHIMA, Shingo HASHIGUCHI, Tetsuo TATEISHI
  • Publication number: 20160373009
    Abstract: In a switching regulator, a first switch and a second switch are turned ON and OFF complementarily according to an output voltage. In a step-up/down mode, a third switch and a fourth switch are turned ON and OFF complementarily while the ON-duty D of the third switch is kept fixed.
    Type: Application
    Filed: June 28, 2016
    Publication date: December 22, 2016
    Inventors: Tetsuo TATEISHI, Yuhei YAMAGUCHI, Shingo HASHIGUCHI, Kiyotaka UMEMOTO
  • Publication number: 20120049821
    Abstract: The switching regulator according to the present invention comprises an oscillation circuit for generating a clock signal having a predetermined oscillation frequency; and a switching signal generation circuit for generating a switching signal for driving a switching element connected to an output circuit; wherein the switching signal generation circuit varies the ON time of the switching signal so that the frequency of the switching signal approaches the frequency of the clock signal; and varies the timing at which the switching signal is ON so that an output voltage outputted from the output circuit approaches a predetermined reference voltage.
    Type: Application
    Filed: August 18, 2011
    Publication date: March 1, 2012
    Applicant: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Hideo Hara, Kiyotaka Umemoto