Patents by Inventor Shingo Kadomura

Shingo Kadomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8828886
    Abstract: Disclosed is a low dielectric constant insulating film formed of a polymer containing Si atoms, O atoms, C atoms, and H atoms, which includes straight chain molecules in which a plurality of basic molecules with an SiO structure are linked in a straight chain, binder molecules with an SiO structure linking a plurality of the straight chain molecules. The area ratio of a signal indicating a linear type SiO structure is 49% or more, and the signal amount of the signal indicating Si(CH3) is 66% or more.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: September 9, 2014
    Assignee: Tohoku University
    Inventors: Seiji Samukawa, Shigeo Yasuhara, Shingo Kadomura, Tsutomu Shimayama, Hisashi Yano, Kunitoshi Tajima, Noriaki Matsunaga, Masaki Yoshimaru
  • Publication number: 20120190212
    Abstract: Disclosed is a low dielectric constant insulating film formed of a polymer containing Si atoms, O atoms, C atoms, and H atoms, which includes straight chain molecules in which a plurality of basic molecules with an SiO structure are linked in a straight chain, binder molecules with an SiO structure linking a plurality of the straight chain molecules. The area ratio of a signal indicating a linear type SiO structure is 49% or more, and the signal amount of the signal indicating Si(CH3) is 66% or more.
    Type: Application
    Filed: April 5, 2012
    Publication date: July 26, 2012
    Inventors: Seiji SAMUKAWA, Shigeo Yasuhara, Shingo Kadomura, Tsutomu Shimayama, Hisashi Yano, Kunitoshi Tajima, Noriaki Matsunaga, Masaki Yoshimaru
  • Publication number: 20090325328
    Abstract: A plasma processing method is provided. The method includes providing photon detection sensors for measuring an ultraviolet-light-induced current around circumferential portions of a wafer stage within a plasma chamber. The method also includes providing a semiconductor wafer on the wafer stage and performing plasma processing so as to form an insulating layer the semiconductor wafer or etch an insulating layer formed on the semiconductor wafer.
    Type: Application
    Filed: September 3, 2009
    Publication date: December 31, 2009
    Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
    Inventors: Seiji Samukawa, Satoshi Nishikawa, Shingo Kadomura
  • Publication number: 20050263247
    Abstract: In a plasma processing apparatus which includes a chamber (1) equipped with a wafer stage (3) for mounting thereon a substrate (2) to be processed, and which processes the substrate (2) by exposure to a plasma (4), a photon detection sensor (5) for measuring an ultraviolet-light-induced current is placed on a circumferential portion of a substrate mounting surface (3a) of the wafer stage (3) so that the occurrence of an abnormal discharge can be detected, in real time, from a change in the output of the photon detection sensor (5).
    Type: Application
    Filed: February 18, 2005
    Publication date: December 1, 2005
    Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
    Inventors: Seiji Samukawa, Satoshi Nishikawa, Shingo Kadomura
  • Patent number: 6943104
    Abstract: A method of rapid etching of an insulating film including an organic-based dielectric film without forming a damage layer or causing decline of the throughput, including the steps of forming an insulating film including an organic-based dielectric film such as a stacked film comprised of a polyarylether film or other organic-based dielectric film and a silicon oxide-based dielectric film or other insulating film, forming a mask layer by patterning above the insulating film, and when etching the organic-based dielectric film portion, using ions or radicals containing NH group generated by gaseous discharge in a mixed gas of hydrogen gas and nitrogen gas or a mixed gas of ammonia gas for etching using the mask layer as an etching mask, to etch the insulating layer and form openings etc. while generating reaction products containing CN group.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: September 13, 2005
    Assignee: Sony Corporation
    Inventors: Masanaga Fukasawa, Shingo Kadomura
  • Patent number: 6805973
    Abstract: A method for producing an aluminum nitride/aluminum base composite material comprising the steps of; (A) charging aluminum nitride powder into a container provided in a molten metal pressure apparatus, (B) applying pressure to the aluminum nitride powder in the container, (C) pouring a molten aluminum base material into the container, and, (D) applying pressure to the molten aluminum base material in the container to fill the aluminum base material in space between the aluminum nitride powder particles.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: October 19, 2004
    Assignee: Sony Corporation
    Inventors: Shingo Kadomura, Kei Takatsu, Shinsuke Hirano, Nobuyuki Suzuki
  • Publication number: 20040040687
    Abstract: A method for producing an aluminum nitride/aluminum base composite material comprising the steps of; (A) charging aluminum nitride powder into a container provided in a molten metal pressure apparatus, (B) applying pressure to the aluminum nitride powder in the container, (C) pouring a molten aluminum base material into the container, and, (D) applying pressure to the molten aluminum base material in the container to fill the aluminum base material in space between the aluminum nitride powder particles.
    Type: Application
    Filed: September 3, 2003
    Publication date: March 4, 2004
    Inventors: Shingo Kadomura, Kei Takatsu, Shinsuke Hirano, Nobuyuki Suzuki
  • Publication number: 20040043597
    Abstract: A method of rapid etching of an insulating film including an organic-based dielectric film without forming a damage layer or causing decline of the throughput, including the steps of forming an insulating film including an organic-based dielectric film such as a stacked film comprised of a polyarylether film or other organic-based dielectric film and a silicon oxide-based dielectric film or other insulating film, forming a mask layer by patterning above the insulating film, and when etching the organic-based dielectric film portion, using ions or radicals containing NH group generated by gaseous discharge in a mixed gas of hydrogen gas and nitrogen gas or a mixed gas of ammonia gas for etching using the mask layer as an etching mask, to etch the insulating layer and form openings etc. while generating reaction products containing CN group.
    Type: Application
    Filed: September 3, 2003
    Publication date: March 4, 2004
    Inventors: Masanaga Fukasawa, Shingo Kadomura
  • Patent number: 6668905
    Abstract: A method for producing an aluminum nitride/aluminum base composite material comprising the steps of; (A) charging aluminum nitride powder into a container provided in a molten metal pressure apparatus, (B) applying pressure to the aluminum nitride powder in the container, (C) pouring a molten aluminum base material into the container, and, (D) applying pressure to the molten aluminum base material in the container to fill the aluminum base material in space between the aluminum nitride powder particles.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: December 30, 2003
    Assignee: Sony Corporation
    Inventors: Shingo Kadomura, Kei Takatsu, Shinsuke Hirano, Nobuyuki Suzuki
  • Patent number: 6645852
    Abstract: A process for fabricating a semiconductor device, which comprises forming a recess portion in an insulating film covering a wiring made of copper or a copper alloy so that the recess portion reaches the wiring, wherein, after forming the recess portion, a plasma treatment using a gas containing hydrogen gas and nitrogen gas is conducted in a state such that the wiring is exposed through the bottom portion of the recess portion, or a plasma treatment using a gas containing hydrogen gas is conducted in a state such that the wiring is exposed through the bottom portion of the recess portion while cooling a substrate on which the wiring is formed. By the process of the present invention, a problem of redeposition of copper on the sidewall of a via hole in the argon sputtering and a problem of an etching process of the organic insulating film in the hydrogen plasma treatment can be solved, thus realizing excellent cleaning of the bottom portion of the via hole.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: November 11, 2003
    Assignee: Sony Corporation
    Inventors: Mitsuru Taguchi, Shingo Kadomura, Miyata Koji
  • Patent number: 6638848
    Abstract: A method of rapid etching of an insulating film including an organic-based dielectric film without forming a damage layer or causing decline of the throughput, including the steps of forming an insulating film including an organic-based dielectric film such as a stacked film having a polyarylether film or other organic-based dielectric film and a silicon oxide-based dielectric film or other insulating film, forming a mask layer by patterning above the insulating film, and when etching the organic-based dielectric film portion, using ions or radicals containing NH group generated by gaseous discharge in a mixed gas of hydrogen gas and nitrogen gas or a mixed gas of ammonia gas for etching using the mask layer as an etching mask, to etch the insulating layer and form openings etc. while generating reaction products containing CN group.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: October 28, 2003
    Assignee: Sony Corporation
    Inventors: Masanaga Fukasawa, Shingo Kadomura
  • Publication number: 20020081445
    Abstract: The invention provides a substrate processing apparatus using a composite material which permits avoidance of occurrence of damages caused by the difference in thermal expansion between different materials and can be with stand the use at high temperatures. The substrate processing apparatus for processing a substrate is partially (for example, a substrate mounting stage) composed of a composite material 11 consisting of a matrix 12 comprising a ceramics member made of, for example, cordierite ceramics, aluminum nitride and/or a texture filled with an aluminum-based material (for example, aluminum or aluminum and silicon), and a ceramics layer (comprising, for example, Al2O3 and/or AlN) provided on the surface of the matrix 12.
    Type: Application
    Filed: September 7, 2001
    Publication date: June 27, 2002
    Inventors: Shingo Kadomura, Kei Takatsu, Shinsuke Hirano
  • Patent number: 6391437
    Abstract: The invention provides a substrate processing apparatus using a composite material which permits avoidance of occurrence of damages caused by the difference in thermal expansion between different materials and can be with stand the use at high temperatures. The substrate processing apparatus for processing a substrate is partially (for example, a substrate mounting stage) composed of a composite material 11 consisting of a matrix 12 comprising a ceramics member made of, for example, cordierite ceramics, aluminum nitride and/or a texture filled with an aluminum-based material (for example, aluminum or aluminum and silicon), and a ceramics layer (comprising, for example, Al2O3 and/or AlN) provided on the surface of the matrix 12.
    Type: Grant
    Filed: January 29, 1998
    Date of Patent: May 21, 2002
    Assignee: Sony Corporation
    Inventors: Shingo Kadomura, Kei Takatsu, Shinsuke Hirano
  • Patent number: 6380065
    Abstract: In a related interconnection structure that is formed by filling a metal, there have been problems, since defective connection occurs due to generation of voids and other features caused by poor filling of the metal, which entails reduction in reliability, and contact resistance is large due to a barrier metal layer at a contact portion. A novel interconnection structure is provided which comprises: a recess (for example, a contact hole, a trench, or a trench and a contact hole formed at a bottom of the trench), which is connected onto a conductive material mass formed in an insulating film, and which is formed in the insulating film; a barrier metal layer formed on side walls of the recess; and metal material masses filled in the interior of the recess, wherein the metal material masses are formed with a metal repeatedly filled into the recess over a plurality of times, and a metal material mass and a conductive material mass are directly connected to each other.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: April 30, 2002
    Assignee: Sony Corporation
    Inventors: Naoki Komai, Shingo Kadomura, Mitsuru Taguchi, Akira Yoshio, Takaaki Miyamoto
  • Patent number: 6352937
    Abstract: There is provided a method used for processing an organic low dielectric constant insulating film to a desired shape for enabling facilitated stripping of an organic film formed on top of the organic low dielectric constant insulating film. Specifically, there is provided a method for stripping an organic film formed on a layered unit having at least an organic low dielectric constant insulating film. This method includes generating radicals in a gas mainly composed of fluorine-based gas, and stripping the organic film by the generated radicals.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: March 5, 2002
    Assignees: Sony Corporation, Gamma Precision Technology Inc.
    Inventors: Shingo Kadomura, Jerry Wong, Masato Toshima
  • Patent number: 6191031
    Abstract: Upon forming a groove and a connection hole by a dual damascene process, there is a problem in that the connection hole has a bowing shape, and it is difficult to form a shape of the connection hole in a good and stable manner. A process for producing a multi-layer wiring structure is provided, which comprises a step of forming an inter level dielectric film 15 covering a lower layer wiring 14; a step of forming a connection hole 16 in the inter level dielectric film 15 to reach the lower layer wiring 14; a step of forming an inter metal dielectric film 17 filling the connection hole 16 on the inter level dielectric film 15, with an insulating material having an etching rate larger than an etching rate of the inter level dielectric film 15; and a step of forming a concave part 18 in the inter metal dielectric film 17, and selectively re-opening the connection hole 16 with respect to the inter level dielectric film in such a manner that the connection hole is continuous to the concave part 18.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: February 20, 2001
    Assignee: Sony Corporation
    Inventors: Mitsuru Taguchi, Shingo Kadomura
  • Patent number: 6174408
    Abstract: An apparatus 1 for manufacturing a semiconductor device capable of actually putting the low temperature etching technique into practical use is also provided, having a vacuum chamber 2 in which a specimen stage 12 having a cooling means is disposed at the inside and a plasma generation means for generating plasmas, in which a specimen, for example, semiconductor substrate W is processed by generating plasmas while controlling the temperature of the specimen W placed on a specimen stage 12 by cooling the specimen stage 12 by a cooling means. The cooling means uses a liquefied gas or a gas as a coolant, the flow channel for the coolant is formed by arranging in parallel a plurality of pipelines 21a-21d having diameters different from each other at positions before flowing to the specimen stage, and the specimen stage 12 is cooled by flowing the coolant through the pipelines 21a-21d.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: January 16, 2001
    Assignee: Sony Corporation
    Inventors: Shingo Kadomura, Tomohide Jozaki, Shinsuke Hirano
  • Patent number: 6120661
    Abstract: A glass substrate processing apparatus, part of which comprises a composite material, the composite material being formed of a matrix and a ceramic layer formed on a surface of the matrix by a thermal spraying method, the matrix being formed of a ceramic member and an aluminum-containing material filled in a texture of the ceramic member.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: September 19, 2000
    Assignee: Sony Corporation
    Inventors: Shinsuke Hirano, Kei Takatsu, Shingo Kadomura
  • Patent number: 6096160
    Abstract: Controlling ion/radical ratio and monoatomic/polyatomic radical ratio in a process plasma provides improved processing performance during inductively-coupled plasma and/or helicon wave plasma processing of substrate materials. In a plasma processing method employing inductively coupled plasma, high frequency current to a high frequency antenna is intermittently supplied in a controlled manner to control the state of gas dissociation to promote formation of polyatomic radicals. In a plasma processing method employing helicon wave plasma, current supplied to a magnetic field generator is intermittently supplied in a controlled manner to promote formation of ions. In a preferred method, both the high frequency current and magnetic field generating current are varied in a controlled manner to provide a variable plasma composition, i.e., radical rich plasma or ion-rich plasma, as desired, for improved plasma processing, especially improved selective anisotropic dry etching at high etch rate.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: August 1, 2000
    Assignee: Sony Corporation
    Inventor: Shingo Kadomura
  • Patent number: 6063710
    Abstract: A method of dry etching treatment capable of attaining both high selectivity and fine fabrication at a high accuracy simultaneously is provided, in which an etching treatment comprising a plurality of steps are applied to a specimen W in one identical processing apparatus, and the temperature of the specimen is changed between etching of one step and etching of another step succeeding thereto, among the plurality of the steps, thereby applying etching at temperatures different between the one step and the step succeeding thereto.
    Type: Grant
    Filed: February 21, 1997
    Date of Patent: May 16, 2000
    Assignee: Sony Corporation
    Inventors: Shingo Kadomura, Tomohide Jozaki, Shinsuke Hirano