Patents by Inventor Shingo Miyahara

Shingo Miyahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Operation analysis method of semiconductor integrated circuit
    Patent number: 7779376
    Abstract: Operation analysis is performed for a semiconductor integrated circuit designed by using substrate bias control technology. Power supply potential and substrate potential are analyzed by using circuit information of the semiconductor integrated circuit, and from obtained power supply potential waveform information and substrate potential waveform information, potential difference information indicating a difference value between the power supply potential and the substrate potential is obtained. On the basis of this potential difference information, effects on circuit delay due to substrate noise are analyzed using a delay library showing a relationship between the difference value and the effects on circuit delay. Further, a determination is performed as to whether the difference value exceeds a predetermined difference restriction value.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: August 17, 2010
    Assignee: Panasonic Corporation
    Inventors: Shingo Miyahara, Kenji Shimazaki
  • Operation analysis method of semiconductor integrated circuit
    Publication number: 20080092090
    Abstract: Operation analysis is performed for a semiconductor integrated circuit designed by using substrate bias control technology. Power supply potential and substrate potential are analyzed by using circuit information of the semiconductor integrated circuit, and from obtained power supply potential waveform information and substrate potential waveform information, potential difference information indicating a difference value between the power supply potential and the substrate potential is obtained. On the basis of this potential difference information, effects on circuit delay due to substrate noise are analyzed using a delay library showing a relationship between the difference value and the effects on circuit delay. Further, a determination is performed as to whether the difference value exceeds a predetermined difference restriction value.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 17, 2008
    Inventors: Shingo Miyahara, Kenji Shimazaki