Abstract: A power supply voltage detection device includes a reference voltage generating circuit, an integrator circuit, a lower limit comparator, and an upper limit comparator. The reference voltage generating circuit generates lower and upper limit reference voltages by resistance-dividing a power supply voltage. The integrator circuit integrates comparative voltages extracted by resistance-dividing the power supply voltage. The lower limit comparator compares the lower limit reference voltage from the reference voltage generating circuit with an output voltage from the integrator circuit to detect that the power supply voltage becomes equal to or lower than a lower limit. The upper limit comparator compares the upper reference voltage from the reference voltage generating circuit with an output voltage from the integrator circuit to detect that the power supply voltage becomes equal to or higher than an upper limit.

Abstract: Disclosed is a timing check circuit comprising a signal change detector, connected to a first input terminal, a decision window generator for receiving the output of the signal change detector, a decision condition detector, connected to a second input terminal, and an AND gate for obtaining a logical product of the output of the decision window generator and the output of the decision condition detector. The output of this AND gate is connected to a clock input terminal of a flip-flop of a logic cell in a specific system. When there is an output from the AND gate, it is determined that an error has occurred. With this structure, a timing check system designed on the premise that logic cells in a specific system are used can execute timing check for a functional macro constituted of a combination of logic cells in the specific system.