Patents by Inventor Shingo Oosaka
Shingo Oosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9805980Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: January 13, 2016Date of Patent: October 31, 2017Assignee: Renesas Electronics CorporationInventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20160133521Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: January 13, 2016Publication date: May 12, 2016Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamagushi, Noriyuki Takahashi
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Publication number: 20150004755Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: September 18, 2014Publication date: January 1, 2015Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 8877613Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: September 30, 2010Date of Patent: November 4, 2014Assignees: Renesas Electronics Corporation, Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20110020984Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: September 30, 2010Publication date: January 27, 2011Inventors: Tadashi MUNAKATA, Shingo OOSAKA, Mitsuru KINOSHITA, Yoshihiko YAMAGUCHI, Noriyuki TAKAHASHI
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Patent number: 7816185Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: August 3, 2009Date of Patent: October 19, 2010Assignees: Renesas Electronics Corporation, Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20090291529Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: August 3, 2009Publication date: November 26, 2009Inventors: TADASHI MUNAKATA, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 7579216Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: May 12, 2008Date of Patent: August 25, 2009Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20080286902Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: May 12, 2008Publication date: November 20, 2008Inventors: Tadashi MUNAKATA, Shingo OOSAKA, Mitsuru KINOSHITA, Yoshihiko YAMAGUCHI, Noriyuki TAKAHASHI
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Patent number: 7384820Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: February 24, 2006Date of Patent: June 10, 2008Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20060141677Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: February 24, 2006Publication date: June 29, 2006Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 7033857Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: June 17, 2003Date of Patent: April 25, 2006Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20040038510Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: June 17, 2003Publication date: February 26, 2004Applicants: Hitachi, Ltd., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi