Patents by Inventor Shingo Oota

Shingo Oota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5493521
    Abstract: In a vector calculation apparatus, a vector adder (21) produces an adder output signal (E) by calculating a three-term sum of a first, a second, and a third adder input signal which are produced in accordance with the adder output signal, a predetermined value ("0"), a first vector (A), and a second vector (B) under control of a control circuit (29). A first selecting circuit (26) selects, as a first selected signal, one of the adder output signal and the first vector. A second selecting circuit (27) selects, as a second selected signal, one of the adder output signal and the second vector. A zeroth selecting circuit (24) selects, as a zeroth selected signal, one of the adder output signal and the predetermined value. The vector adder is supplied with the first selected signal as the first adder input signal, with the second selected signal as the second adder input signal, and with the zeroth selected signal as the third adder input signal.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: February 20, 1996
    Assignee: NEC Corporation
    Inventor: Shingo Oota
  • Patent number: 4852040
    Abstract: In a vector calculation circuit for use in a vector addition of first, second, and third vectors each of which is composed of an identical number to one another, a first adder circuit (26) comprises a carry save adder which carries out a carry save addition of a set of three components selected from the first through third vectors to produce a local sum and a carry collectively as a result of the carry save addition. The local sum and the carry is successively summed up by a second adder circuit (27) to produce a primary sum which forms an output vector. The primary sum may successively be sent back to the first adder circuit as the third vector. A selector circuit may be connected to the first adder circuit to select the first through third vectors and a fixed value of zero and to selectively add either two of the first through third vectors or three of them. Alternatively, a pair of selectors may be included to select either the first and the second vectors or the local sum and the carry.
    Type: Grant
    Filed: March 3, 1988
    Date of Patent: July 25, 1989
    Assignee: NEC Corporation
    Inventor: Shingo Oota
  • Patent number: 4065082
    Abstract: An engine mounting apparatus adapted to absorb engine vibration in every direction which comprises the base frame of a vehicle, a bracket for mounting the engine on said base frame, a first bolt for fastening said bracket against said base frame, a cushion rubber disposed coaxially with said first bolt, and a second bolt having a spacer on the periphery thereof so as to provide a clearance between the bracket and the outer periphery of the spacer.
    Type: Grant
    Filed: October 21, 1976
    Date of Patent: December 27, 1977
    Assignee: Kabushiki Kaisha Komatsu Seisakusho
    Inventor: Shingo Oota