Abstract: A semiconductor device includes: a semiconductor element having main electrodes on opposite faces in a plate thickness direction; a substrate having an insulating base member, a front-face metal body disposed on a front face of the insulating base member and electrically connected to one of the main electrodes of the semiconductor element, and a back-face metal body disposed on a back face of the insulating base member; a bonding member; and a metal member connected to the front-face metal body through the bonding member. The metal member has an opposing face opposing an upper face of the front-face metal body and a receiving portion disposed adjacent to the opposing face to provide a receiving space to receive the bonding member therein. The bonding member is received in the receiving space in a state where the opposing face is in contact with the upper face of the front-face metal body.

Abstract: A semiconductor module may include a plurality of semiconductor elements; and a first power terminal, a second power terminal and a third power terminal electrically connected to the plurality of semiconductor elements. The plurality of semiconductor elements may include at least one upper arm switching element electrically connected between the first power terminal and the second power terminal; and at least one lower arm switching element electrically connected between the second power terminal and the third power terminal. A number of the at least one upper arm switching element may be different from a number of the at least one lower arm switching element.

Abstract: A semiconductor device includes a first insulating circuit board, a semiconductor element on the first insulating circuit board, and an encapsulating body. The first insulating circuit board includes a first insulating substrate, and a first inner conductor layer, and a first outer conductor layer. The first inner conductor layer is electrically connected to a first electrode of the semiconductor element inside of the encapsulating body. The first outer conductor layer is exposed from a surface of the encapsulating body. The first inner conductor layer has a first thin-wall portion a thickness of which reduces toward an outer side, along an outer peripheral edge of the first inner conductor layer with a first width. The first outer conductor layer (i) does not have or (ii) has a second thin-wall portion along the outer peripheral edge of the first outer conductor layer with a second width.

Abstract: A semiconductor device includes a first insulating substrate and a first semiconductor element joined to the first insulating substrate through the first conductive spacer. The first insulating substrate includes a first insulating layer and a first inner conductive layer disposed at a side of the first insulating layer. The first inner conductive layer includes a surface having a first region and a second region. The second region surrounds the first region and has larger surface roughness than the first region. The first conductive spacer is joined to the first region of the first inner conductive layer through a first junction layer.

Abstract: A semiconductor device may include a first insulated substrate, a first semiconductor chip and a second semiconductor chip disposed on the first insulated substrate, a second insulated substrate opposed to the first insulated substrate with the first semiconductor chip interposed therebetween, and a third insulated substrate opposed to the first insulated substrate with the second semiconductor chip interposed therebetween and located side by side with the second insulated substrate.

Abstract: A semiconductor device is provided with a first insulated substrate including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, a first semiconductor element disposed on the metal layer on one face of the first insulated substrate, a second insulated substrate including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, a second semiconductor element disposed on one of the metal layers of the second insulated substrate, and an encapsulant encapsulating the first semiconductor element and the second semiconductor element. The metal layer on the other face of the first insulated substrate and the metal layer on the other face of the second insulated substrate are exposed on a first flat surface of the encapsulant.

Abstract: A semiconductor module may include a plurality of semiconductor elements; and a first power terminal, a second power terminal and a third power terminal electrically connected to the plurality of semiconductor elements. The plurality of semiconductor elements may include at least one upper arm switching element electrically connected between the first power terminal and the second power terminal; and at least one lower arm switching element electrically connected between the second power terminal and the third power terminal. A number of the at least one upper arm switching element may be different from a number of the at least one lower arm switching element.

Abstract: A semiconductor device includes a first semiconductor element, a first heat dissipation plate connected to the first semiconductor element, a sealing body that integrally holds the first semiconductor element and the first heat dissipation plate, and a first terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body. The first heat dissipation plate has an insulating substrate, an inner conductor layer, and an outer conductor layer. The outer conductor layer is exposed on a first main surface of the sealing body. The first terminal protrudes from a first side surface adjacent to the first main surface of the sealing body. On the first main surface of the sealing body, at least one first groove extending in a direction along the first side surface is provided in a range located between the outer conductor layer and the first side surface.

Abstract: A semiconductor device disclosed herein may include: a semiconductor element; and a stacked substrate on which the semiconductor element is disposed, wherein the stacked substrate includes an insulator substrate, a first conductive layer and a second conductive layer, the first conductive layer being disposed on one side of the insulator substrate, and the second conductive layer being disposed on another side of the insulator substrate, a volume of the second conductive layer is smaller than a volume of the first conductive layer, a material of the insulator substrate has a smaller coefficient of linear thermal expansion and a higher rigidity than a material of the first conductive layer and a material of the second conductive layer, and a protrusion is provided on the one side of the insulator substrate, and the protrusion protrudes along a side surface of the first conductive layer.

Abstract: A semiconductor device may include a first insulated substrate, a first semiconductor chip and a second semiconductor chip disposed on the first insulated substrate, a second insulated substrate opposed to the first insulated substrate with the first semiconductor chip interposed therebetween, and a third insulated substrate opposed to the first insulated substrate with the second semiconductor chip interposed therebetween and located side by side with the second insulated substrate.

Abstract: A semiconductor device includes a first semiconductor element, a first heat dissipation plate connected to the first semiconductor element, a sealing body that integrally holds the first semiconductor element and the first heat dissipation plate, and a first terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body. The first heat dissipation plate has an insulating substrate, an inner conductor layer, and an outer conductor layer. The outer conductor layer is exposed on a first main surface of the sealing body. The first terminal protrudes from a first side surface adjacent to the first main surface of the sealing body. On the first main surface of the sealing body, at least one first groove extending in a direction along the first side surface is provided in a range located between the outer conductor layer and the first side surface.

Abstract: A semiconductor device includes: an insulating substrate including an insulating layer of which a first metal layer and a second metal layer are provided on both surfaces; a semiconductor element provided on the first metal layer; and an external connection terminal bonded to the first metal layer, the external connection terminal being electrically insulated from the second metal layer, wherein: the first metal layer includes a main portion being in contact with the insulating layer, the semiconductor element being provided in the main portion, and a protruding portion protruding from the main portion, the external connection terminal being bonded to the protruding portion; and at least a part of the protruding portion is provided to protrude from an outer peripheral edge of the insulating layer in a plan view of the insulating substrate.

Abstract: A semiconductor device is provided with a first insulated substrate including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, a first semiconductor element disposed on the metal layer on one face of the first insulated substrate, a second insulated substrate including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, a second semiconductor element disposed on one of the metal layers of the second insulated substrate, and an encapsulant encapsulating the first semiconductor element and the second semiconductor element. The metal layer on the other face of the first insulated substrate and the metal layer on the other face of the second insulated substrate are exposed on a first flat surface of the encapsulant.

Abstract: A power module includes an inverter circuit and a pair of conductors that sandwich the inverter circuit. The inverter circuit includes a positive bus bar, a negative bus bar, output bus bars, and element pairs. The element pair has such a configuration that a semiconductor element coupled to the positive bus bar and a semiconductor element coupled to the negative bus bar are coupled to each other via the output bus bar. The semiconductor elements each includes a switching element and a diode connected in antiparallel with the switching element. The positive bus bar, the element pair, and the negative bus bar define a conductive path exhibiting a loop-like shape facing the conductors inside the above-mentioned region.