Abstract: Some embodiments include an integrated assembly having a first semiconductor material configured to comprise a pair of pedestals. The pedestals have upper regions which are separated from one another by a space, and have lower regions which join to one another at a floor region beneath the space. A second semiconductor material is configured as a bridge extending between the pedestals. The bridge is spaced from the floor region by a gap. The bridge has ends adjacent the pedestals, and has a body region between the ends. The body region has an outer periphery. Source/drain regions are within the pedestals, and a channel region is within the bridge. A dielectric material extends around the outer periphery of the body region of the bridge. A conductive material extends around the dielectric material. Some embodiments include methods of forming integrated assemblies.

Abstract: Some embodiments include an integrated assembly having a first semiconductor material configured to comprise a pair of pedestals. The pedestals have upper regions which are separated from one another by a space, and have lower regions which join to one another at a floor region beneath the space. A second semiconductor material is configured as a bridge extending between the pedestals. The bridge is spaced from the floor region by a gap. The bridge has ends adjacent the pedestals, and has a body region between the ends. The body region has an outer periphery. Source/drain regions are within the pedestals, and a channel region is within the bridge. A dielectric material extends around the outer periphery of the body region of the bridge. A conductive material extends around the dielectric material. Some embodiments include methods of forming integrated assemblies.

Abstract: Some embodiments include an integrated assembly having a first semiconductor material configured to comprise a pair of pedestals. The pedestals have upper regions which are separated from one another by a space, and have lower regions which join to one another at a floor region beneath the space. A second semiconductor material is configured as a bridge extending between the pedestals. The bridge is spaced from the floor region by a gap. The bridge has ends adjacent the pedestals, and has a body region between the ends. The body region has an outer periphery. Source/drain regions are within the pedestals, and a channel region is within the bridge. A dielectric material extends around the outer periphery of the body region of the bridge. A conductive material extends around the dielectric material. Some embodiments include methods of forming integrated assemblies.

Abstract: A semiconductor device includes, on one semiconductor substrate: a first element isolation region having a first width, wherein a liner oxide film, a liner nitride film and a silicon dioxide film are provided in succession from an outer peripheral side of an upper surface of the first element isolation region; and a second element isolation region having a second width that is larger than the first width, wherein a liner oxide film and a silicon dioxide film are provided in succession from an outer peripheral side of an upper surface of the second element isolation region.

Abstract: One method for manufacturing a semiconductor device includes forming element isolation grooves and an element isolation groove having a width greater than that of the element isolation grooves in the semiconductor substrate, forming insulating films having relatively low fluidity and having upwardly released voids inside the element isolation grooves, and also covering substantially all of the interior surface of the element isolation groove, forming an insulating film having relatively high fluidity, whereby the insulating film is embedded in the interior of the voids, and reforming the insulating film.

Abstract: A semiconductor device includes, on one semiconductor substrate: a first element isolation region having a first width, wherein a liner oxide film, a liner nitride film and a silicon dioxide film are provided in succession from an outer peripheral side of an upper surface of the first element isolation region; and a second element isolation region having a second width that is larger than the first width, wherein a liner oxide film and a silicon dioxide film are provided in succession from an outer peripheral side of an upper surface of the second element isolation region.

Abstract: A semiconductor device has a first insulation film defining a plurality of contact holes arranged along a predetermined direction. A plurality of first contact plugs is respectively formed in the contact holes. A second insulation film is formed on the first insulation film and defining an opening to expose a predetermined region of the first insulation film including a region where the first contact plugs are formed. A plurality of interconnections are formed to extend across the opening and to be in contact with top surfaces of the first contact plugs, respectively.

Abstract: A method of forming a semiconductor device include the following processes. A groove is formed in a semiconductor substrate. A first insulating film is formed on a bottom surface of the groove and a second insulating film on a side surface of the groove. The second insulating film is thinner than the first insulating film. A conductive layer is formed on the first insulating film.

Abstract: A semiconductor device has a first insulation film defining a plurality of contact holes arranged along a predetermined direction. A plurality of first contact plugs is respectively formed in the contact holes. A second insulation film is formed on the first insulation film and defining an opening to expose a predetermined region of the first insulation film including a region where the first contact plugs are formed. A plurality of interconnections are formed to extend across the opening and to be in contact with top surfaces of the first contact plugs, respectively.

Abstract: A method of manufacturing a semiconductor device, including: preparing a semiconductor substrate having an element-isolating film filled in the first trench and an active region; forming a mask-forming film over the semiconductor substrate; forming a first mask having an opening traversing the active region; performing anisotropic etching using the first mask to form a second mask made of the mask-forming film and a second trench having opposite exposed surfaces of the element-isolating film, being shallower than the first trench and being formed in the active region; implanting oxygen ions obliquely using the second mask such that oxygen ions are radiated at a region including a boundary between a surface of the semiconductor substrate inside the second trench and one of the opposite exposed surfaces of the element-isolating film; oxidizing the oxygen ion-implanted region inside the second trench to form an oxidized region; and removing the oxidized region.