Patents by Inventor Shingo Yasuda
Shingo Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967445Abstract: An NTC thermistor element includes a thermistor body and a plurality of internal electrodes disposed in the thermistor body and opposing each other. The thermistor body includes a region interposed between adjacent internal electrodes of the plurality of internal electrodes. The region of the thermistor body includes a plurality of crystal grains arranged in succession between the internal electrodes adjacent to each other. The plurality of crystal grains include a first crystal grain, a second crystal grain, and a third crystal grain. The first crystal grain is in contact with one internal electrode of the internal electrodes adjacent to each other. The second crystal grain is in contact with another internal electrode of the internal electrodes adjacent to each other. The third crystal grain is not in contact with the first crystal grain and the second crystal grain.Type: GrantFiled: November 27, 2020Date of Patent: April 23, 2024Assignee: TDK CORPORATIONInventors: Daisuke Tsuchida, Takehiko Abe, Yoshihiko Satoh, Shingo Yasuda, Yuki Ikeda, Makikazu Takehana
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ATTACK INFORMATION GENERATION APPARATUS, CONTROL METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
Publication number: 20240054213Abstract: An attack information generation apparatus (2000) determines, for each of a plurality of executions of a target attack, the number of occurrences of one or more events by using a log (10) in its execution period. The attack information generation apparatus (2000) determines, for each of the events, whether or not the number of occurrences of that event determined for each of the plurality of executions of the target attack satisfies a predetermined condition. The attack information generation apparatus (2000) generates attack information (30) associating the target attack with the event whose number of occurrences is determined to satisfy the predetermined condition.Type: ApplicationFiled: November 15, 2021Publication date: February 15, 2024Applicants: NEC Corporation, National Institute of Information and Communications TechnologyInventors: Yusuke TAKAHASHI, Shingo YASUDA -
Patent number: 11566339Abstract: A plating method capable of controlling a concentration of an additive within a proper range during plating of a substrate is disclosed. The plating method includes: disposing an anode and a substrate, having a via-hole formed in a surface thereof, so as to face each other in a plating solution containing an additive; applying a voltage between the anode and the substrate for filling the via-hole with metal; measuring the voltage applied to the substrate; calculating an amount of change in the voltage per predetermined time; and adjusting a concentration of the additive in the plating solution to keep the amount of change in the voltage within a predetermined control range.Type: GrantFiled: February 4, 2021Date of Patent: January 31, 2023Assignee: EBARA CORPORATIONInventors: Yusuke Tamari, Akira Owatari, Mizuki Nagai, Shingo Yasuda
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Publication number: 20220301749Abstract: An NTC thermistor element includes a thermistor body and a plurality of internal electrodes disposed in the thermistor body and opposing each other. The thermistor body includes a region interposed between adjacent internal electrodes of the plurality of internal electrodes. The region of the thermistor body includes a plurality of crystal grains arranged in succession between the internal electrodes adjacent to each other. The plurality of crystal grains include a first crystal grain, a second crystal grain, and a third crystal grain. The first crystal grain is in contact with one internal electrode of the internal electrodes adjacent to each other. The second crystal grain is in contact with another internal electrode of the internal electrodes adjacent to each other. The third crystal grain is not in contact with the first crystal grain and the second crystal grain.Type: ApplicationFiled: November 27, 2020Publication date: September 22, 2022Applicant: TDK CORPORATIONInventors: Daisuke TSUCHIDA, Takehiko ABE, Yoshihiko SATOH, Shingo YASUDA, Yuki IKEDA, Makikazu TAKEHANA
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Publication number: 20220263839Abstract: A computer system comprises an analysis module configured to execute dynamic analysis for a sample of a malicious program, and to output an analysis result including a coupling destination to and from which the malicious program communicates; a variation detection module configured to detect variation of the coupling destination based on results of cyclic observation of the coupling destination, and to output a result of the detection; and an information sharing module configured to store information output from the analysis module and information output from the variation detection module in a form that allows sharing among a plurality of external computers.Type: ApplicationFiled: March 5, 2020Publication date: August 18, 2022Inventors: Shota FUJII, Masato TERADA, Takayuki SATOU, Sho AOKI, Tomohiro SHIGEMOTO, Nobutaka KAWAGUCHI, Yu TSUDA, Nobuyuki KANAYA, Shingo YASUDA, Daisuke INOUE
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Publication number: 20220228285Abstract: Provided are a plating method, an insoluble anode and a plating apparatus capable of reducing consumption of an additive in a plating solution, when plating a substrate including a via or a hole for forming a through electrode. The plating method includes the steps of preparing a substrate including a via or a hole for forming a through electrode, preparing a plating solution tank that is divided, by a diaphragm, into an anode tank in which an insoluble anode is disposed and a cathode tank in which the substrate is disposed, and electroplating the substrate with an anode current density when plating the substrate in the plating solution tank being equal to or more than 0.4 ASD and equal to or less than 1.4 ASD.Type: ApplicationFiled: May 13, 2020Publication date: July 21, 2022Inventors: Hiroyuki Kanda, Naoki Shimomura, Mizuki Nagai, Shingo Yasuda, Akira Owatari
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Publication number: 20210164125Abstract: A plating method capable of controlling a concentration of an additive within a proper range during plating of a substrate is disclosed. The plating method includes: disposing an anode and a substrate, having a via-hole formed in a surface thereof, so as to face each other in a plating solution containing an additive; applying a voltage between the anode and the substrate for filling the via-hole with metal; measuring the voltage applied to the substrate; calculating an amount of change in the voltage per predetermined time; and adjusting a concentration of the additive in the plating solution to keep the amount of change in the voltage within a predetermined control range.Type: ApplicationFiled: February 4, 2021Publication date: June 3, 2021Inventors: Yusuke Tamari, Akira Owatari, Mizuki Nagai, Shingo Yasuda
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Patent number: 10941504Abstract: A plating method capable of controlling a concentration of an additive within a proper range during plating of a substrate is disclosed. The plating method includes: disposing an anode and a substrate, having a via-hole formed in a surface thereof, so as to face each other in a plating solution containing an additive; applying a voltage between the anode and the substrate for filling the via-hole with metal; measuring the voltage applied to the substrate; calculating an amount of change in the voltage per predetermined time; and adjusting a concentration of the additive in the plating solution to keep the amount of change in the voltage within a predetermined control range.Type: GrantFiled: April 9, 2019Date of Patent: March 9, 2021Assignee: EBARA CORPORATIONInventors: Yusuke Tamari, Akira Owatari, Mizuki Nagai, Shingo Yasuda
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Publication number: 20190233967Abstract: A plating method capable of controlling a concentration of an additive within a proper range during plating of a substrate is disclosed. The plating method includes: disposing an anode and a substrate, having a via-hole formed in a surface thereof, so as to face each other in a plating solution containing an additive; applying a voltage between the anode and the substrate for filling the via-hole with metal; measuring the voltage applied to the substrate; calculating an amount of change in the voltage per predetermined time; and adjusting a concentration of the additive in the plating solution to keep the amount of change in the voltage within a predetermined control range.Type: ApplicationFiled: April 9, 2019Publication date: August 1, 2019Inventors: Yusuke TAMARI, Akira OWATARI, Mizuki NAGAI, Shingo YASUDA
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Publication number: 20190211468Abstract: A method of plating a substrate, such as a wafer, by applying a voltage between the substrate and an anode is disclosed. The plating method includes: preparing a substrate having a recess formed in a surface thereof, a conductive layer being formed in at least a part of the recess; placing an insoluble anode and the substrate in contact with a copper sulfate plating solution containing an additive; applying a predetermined plating voltage between the substrate and the insoluble anode by a plating power source to plate the substrate; and shutting off a reverse electric current, which flows from the insoluble anode to the substrate via the plating power source, by a diode disposed between the insoluble anode and the substrate when the predetermined plating voltage is not applied.Type: ApplicationFiled: March 14, 2019Publication date: July 11, 2019Inventors: Shingo YASUDA, Akira OWATARI
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Patent number: 10294580Abstract: A plating method capable of controlling a concentration of an additive within a proper range during plating of a substrate is disclosed. The plating method includes: disposing an anode and a substrate, having a via-hole formed in a surface thereof, so as to face each other in a plating solution containing an additive; applying a voltage between the anode and the substrate for filling the via-hole with metal; measuring the voltage applied to the substrate; calculating an amount of change in the voltage per predetermined time; and adjusting a concentration of the additive in the plating solution to keep the amount of change in the voltage within a predetermined control range.Type: GrantFiled: January 14, 2015Date of Patent: May 21, 2019Assignee: EBARA CORPORATIONInventors: Yusuke Tamari, Akira Owatari, Mizuki Nagai, Shingo Yasuda
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Patent number: 10294581Abstract: A method of plating a substrate, such as a wafer, by applying a voltage between the substrate and an anode is disclosed. The plating method includes: preparing a substrate having a recess formed in a surface thereof, a conductive layer being formed in at least a part of the recess; placing an insoluble anode and the substrate in contact with a copper sulfate plating solution containing an additive; applying a predetermined plating voltage between the substrate and the insoluble anode by a plating power source to plate the substrate; and shutting off a reverse electric current, which flows from the insoluble anode to the substrate via the plating power source, by a diode disposed between the insoluble anode and the substrate when the predetermined plating voltage is not applied.Type: GrantFiled: October 1, 2015Date of Patent: May 21, 2019Assignee: EBARA CORPORATIONInventors: Shingo Yasuda, Akira Owatari
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Publication number: 20170003544Abstract: A display apparatus according to the present invention includes a display unit configured to display an image, an accommodating unit arranged on a back surface side of the display unit, and configured to accommodate a circuit board for driving the display unit, and an exhaust fan arranged on a back surface side of the accommodating unit. The accommodating unit includes an opening through which air flows in from an outer side of the accommodating unit, and the opening is provided so that an amount of air having flowed in through the opening and flowing on an upper side of the circuit board becomes greater than an amount of air having flowed in through the opening and flowing on a lower side of the circuit board.Type: ApplicationFiled: June 20, 2016Publication date: January 5, 2017Inventor: Shingo Yasuda
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Patent number: 9376758Abstract: An electroplating method can securely and efficiently fill a plated metal into deep high-aspect ratio vias in a bottom-up manner without producing defects in the plated metal. The electroplating method includes: immersing a substrate, having vias formed in a surface, and an anode in a plating solution in a plating tank, the anode being disposed opposite the surface of the substrate; and intermittently passing a plating current at a constant current value between the substrate and the anode in such a manner that the supply and the stop of the plating current are repeated, and that the proportion of a current supply time during which the plating current is supplied increases with the progress of plating, thereby filling a plated metal into the vias.Type: GrantFiled: December 5, 2011Date of Patent: June 28, 2016Assignee: EBARA CORPORATIONInventors: Shingo Yasuda, Fumio Kuriyama, Masashi Shimoyama, Mizuki Nagai, Yusuke Tamari
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Publication number: 20160097141Abstract: A method of plating a substrate, such as a wafer, by applying a voltage between the substrate and an anode is disclosed. The plating method includes: preparing a substrate having a recess formed in a surface thereof, a conductive layer being formed in at least a part of the recess; placing an insoluble anode and the substrate in contact with a copper sulfate plating solution containing an additive; applying a predetermined plating voltage between the substrate and the insoluble anode by a plating power source to plate the substrate; and shutting off a reverse electric current, which flows from the insoluble anode to the substrate via the plating power source, by a diode disposed between the insoluble anode and the substrate when the predetermined plating voltage is not applied.Type: ApplicationFiled: October 1, 2015Publication date: April 7, 2016Inventors: Shingo YASUDA, Akira OWATARI
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Publication number: 20160033821Abstract: a display device comprises a display panel; a light source member which is disposed on a rear surface side of the display panel and which has thereon a plurality of light source elements that irradiate light; a case member which is disposed on the rear surface side of the display panel and to which the light source member is attached; and a heat dissipation member which diffuses heat generated by the light source member, wherein the light source member is attached on an outer side of the case member, and is sandwiched between the case member and the heat dissipation member; and the case member has a fastening member that fastens the light source member and the heat dissipation member.Type: ApplicationFiled: July 28, 2015Publication date: February 4, 2016Inventor: Shingo Yasuda
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Publication number: 20150203983Abstract: A plating method capable of controlling a concentration of an additive within a proper range during plating of a substrate is disclosed. The plating method includes: disposing an anode and a substrate, having a via-hole formed in a surface thereof, so as to face each other in a plating solution containing an additive; applying a voltage between the anode and the substrate for filling the via-hole with metal; measuring the voltage applied to the substrate; calculating an amount of change in the voltage per predetermined time; and adjusting a concentration of the additive in the plating solution to keep the amount of change in the voltage within a predetermined control range.Type: ApplicationFiled: January 14, 2015Publication date: July 23, 2015Inventors: Yusuke TAMARI, Akira OWATARI, Mizuki NAGAI, Shingo YASUDA
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Publication number: 20140299476Abstract: An electroplating method is disclosed. The method includes preparing a substrate having via holes in a surface thereof, performing a pretreatment of the substrate surface by immersing the substrate in a pretreatment liquid containing a plating suppressor to adsorb the plating suppressor onto the substrate surface, immersing the pretreated substrate in a plating solution containing a plating suppressor and a plating accelerator to replace the pretreatment liquid, attached to the substrate surface including interior surfaces of the via holes, with the plating solution, and then electroplating the substrate surface to fill the via holes with metal.Type: ApplicationFiled: March 27, 2014Publication date: October 9, 2014Inventors: Shingo YASUDA, Akira OWATARI, Mizuki NAGAI, Akira SUSAKI
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Publication number: 20130077288Abstract: A light source apparatus having a plurality of light-emitting members, according to the present invention, comprises: a light source substrate provided with a plurality of light source groups each of which is configured by first to fourth light-emitting members; and a reflective sheet disposed on the light source substrate and having a hole exposing the light source group, wherein, on a surface parallel to the light source substrate, a circumscribed quadrangle of each of the first to fourth light-emitting members has a substantially rectangular shape, and a shorter side of one of two adjacent light-emitting members is positioned on substantially the same straight line as a longer side of the other one of the two adjacent light-emitting members.Type: ApplicationFiled: September 5, 2012Publication date: March 28, 2013Applicant: CANON KABUSHIKI KAISHAInventor: Shingo Yasuda
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Publication number: 20120255864Abstract: An electroplating method is capable of reliably embedding via holes with a plated metal such as copper or the like when a substrate with a seed layer of a metal having a greater ionization tendency than hydrogen is electroplated using an acidic plating solution such as a copper sulfate plating solution. The electroplating method including preparing a substrate having via holes covered with a first metal, which has a greater ionization tendency than hydrogen, in a surface thereof, pretreating the substrate by immersing the substrate in a pretreatment solution in which a second metal that is more noble than the first metal or a salt thereof is dissolved, and then electroplating the surface of the substrate to embed the second metal or a third metal in the via holes.Type: ApplicationFiled: April 5, 2012Publication date: October 11, 2012Applicant: EBARA CORPORATIONInventors: Mizuki Nagai, Yusuke Tamari, Shingo Yasuda