Patents by Inventor Shingo Yoshizawa

Shingo Yoshizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120269301
    Abstract: A MIMO detector for use in MIMO-OFDM wireless communication that forms a plurality of propagation paths by using a plurality of transmitting and receiving antennas includes: an inverse matrix calculator operating as an inverse matrix calculation unit configured to calculate an inverse matrix of a matrix of the propagation path based on a signal received by a receiver; a detection speed controller operating as an estimation unit configured to estimate a variation in the propagation path over time; and a phase synchronization circuit and a regulator configured to variably control a processing time required to calculate the inverse matrix by the inverse matrix calculator, according to the variation in the propagation path over time estimated by the detection speed controller. The MIMO detector is provided on the side of the receiver of the wireless communication.
    Type: Application
    Filed: April 16, 2012
    Publication date: October 25, 2012
    Applicant: RayTron, Inc.
    Inventors: Yoshikazu Miyanaga, Shingo Yoshizawa
  • Publication number: 20120102083
    Abstract: A Fourier transform processor that is used in wireless communication includes: a Fourier transform mechanism including a butterfly unit and configured to perform a Fourier transform on data that is input to the Fourier transform processor; a first memory configured to store the data that is input to the Fourier transform mechanism; a first commutator configured to rearrange the data that is input to the first memory; and a second commutator configured to rearrange the data that is output from the first memory and that is input to the butterfly unit. This configuration allows the size and power consumption of the Fourier transform processor to be reduced.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 26, 2012
    Applicant: RayTron, Inc.
    Inventors: Yoshikazu Miyanaga, Shingo Yoshizawa
  • Publication number: 20120095346
    Abstract: There is provided an ultrasonic diagnosis apparatus capable of reducing an unnecessary signal component in a reception signal. A sign data array formed of a plurality of sign data items arranged in an element arranging direction is extracted from a plurality of element reception signals having been subjected to delay processing but having not been subjected to summing processing. A factor computing unit computes a first factor indicating a level of sign coherence in the sign data array and a second factor indicating a sign transit density in the sign data array. The factor computing unit then computes a factor (evaluation value) for adjusting gain of the reception signal, based on the first factor and the second factor.
    Type: Application
    Filed: October 3, 2011
    Publication date: April 19, 2012
    Applicant: HITACHI ALOKA MEDICAL, LTD.
    Inventors: Shingo Yoshizawa, Masanori Hisatsu
  • Patent number: 7650131
    Abstract: A wireless receiver which is used for a digital signal transmission system to wirelessly transmit a digital signal by packetizing and modifying it, selectively sets the shortest arithmetical bit length satisfying a required communication quality when performs demodulation arithmetical processing to demodulate a digital signal to be packet-transmitted, inputs a demodulation arithmetical result by the arithmetical bit length to calculate an error vector magnitude value that is a measure indicating a difference between the arithmetical result and a known ideal result, predicts a bit error rate by using the EVM value as an evaluation criterion, selects an arithmetical bit length by which the bit error rate becomes optimum, and executes the demodulating arithmetical processing by the selected arithmetical bit length.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: January 19, 2010
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Shingo Yoshizawa, Yoshikazu Miyanaga, Masaki Hirata
  • Publication number: 20070226289
    Abstract: A wireless receiver which is used for a digital signal transmission system to wirelessly transmit a digital signal by packetizing and modifying it, selectively sets the shortest arithmetical bit length satisfying a required communication quality when performs demodulation arithmetical processing to demodulate a digital signal to be packet-transmitted, inputs a demodulation arithmetical result by the arithmetical bit length to calculate an error vector magnitude value that is a measure indicating a difference between the arithmetical result and a known ideal result, predicts a bit error rate by using the EVM value as an evaluation criterion, selects an arithmetical bit length by which the bit error rate becomes optimum, and executes the demodulating arithmetical processing by the selected arithmetical bit length.
    Type: Application
    Filed: March 20, 2007
    Publication date: September 27, 2007
    Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
    Inventors: Shingo Yoshizawa, Yoshikazu Miyanaga, Masaki Hirata