Patents by Inventor Shinichi Fukuzako
Shinichi Fukuzako has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11551624Abstract: Provided is a display panel, a source driver that generates a gradation voltage signal based on an image data signal, a timing controller that supplies the image data signal to the source driver, and an illumination drive unit that controls an amount of light of a backlight that illuminates each of a plurality of areas formed by dividing a display screen in the display panel. The source driver or the timing controller calculates feature values of the image data signal corresponding to each of the plurality of areas of the display panel and supplies a dimming data signal representing the amount of light of the backlight according to the feature values of each area to the illumination drive unit. The illumination drive unit controls the amount of light of the backlight for each of the plurality of areas based on the dimming data signal.Type: GrantFiled: May 12, 2021Date of Patent: January 10, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Hiroaki Ishii, Shinichi Fukuzako
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Publication number: 20210366417Abstract: Provided is a display panel, a source driver that generates a gradation voltage signal based on an image data signal, a timing controller that supplies the image data signal to the source driver, and an illumination drive unit that controls an amount of light of a backlight that illuminates each of a plurality of areas formed by dividing a display screen in the display panel. The source driver or the timing controller calculates feature values of the image data signal corresponding to each of the plurality of areas of the display panel and supplies a dimming data signal representing the amount of light of the backlight according to the feature values of each area to the illumination drive unit. The illumination drive unit controls the amount of light of the backlight for each of the plurality of areas based on the dimming data signal.Type: ApplicationFiled: May 12, 2021Publication date: November 25, 2021Applicant: LAPIS Semiconductor Co., Ltd.Inventors: Hiroaki ISHII, Shinichi FUKUZAKO
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Publication number: 20090135165Abstract: The present invention provides a current-driven driver device capable of current writing at high speed even when a parasitic capacitance exists in a circuit to be driven. Each of current driver circuits includes a first current source for supplying a data current of a current value corresponding to a data signal, and a second current source including a differentiation circuit generating a differential value of a voltage applied to each data line and for supplying a boost current of a current value corresponding to the differential value to the data line.Type: ApplicationFiled: November 21, 2008Publication date: May 28, 2009Applicant: OKI SEMICONDUCTOR CO., LTD.Inventors: Shinichi FUKUZAKO, Reiji Hattori
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Patent number: 7012587Abstract: A display device comprises a plurality of first to fourth switching elements. On the basis of control signals from the drive control circuit, the common line is brought to the selected state when the common line is connected to the low-voltage portion for common lines by turning on the first switching element and turning off the second switching element; the common line is brought to the non-selected state when the common line is brought to the high-impedance state by turning off both the first and second switching elements; the data line is brought to the selected state when the data line is connected to the high-voltage portion for data lines by turning off the third switching element and turning on the fourth switching element; and the data line is brought to the non-selected state when the data line is connected to the low-voltage portion for data lines by turning on the third switching element and turning off the fourth switching element.Type: GrantFiled: June 18, 2002Date of Patent: March 14, 2006Assignee: Oki Electric Industry Co., Ltd.Inventors: Shinichi Satoh, Shinichi Fukuzako, Junji Kashiwada, Kenji Kokuda
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Publication number: 20060022914Abstract: A driving circuit drives a display panel having a matrix of picture elements and electrodes. The driving circuit includes a memory storing compensation data for compensating for position-dependent brightness differences between the picture elements. The brightness differences are due to the stray resistance and capacitance of the picture elements and electrodes. A correction circuit modifies image data according to the compensation data to generate control signals, which are used to control drivers that drive the picture elements via the electrodes. The modified image data produce a display with an even average brightness over the entire display panel.Type: ApplicationFiled: August 2, 2005Publication date: February 2, 2006Applicant: Oki Electric Industry Co., Ltd.Inventors: Naoya Kimura, Tetsuro Hara, Akira Kondo, Takayuki Shimizu, Haruyo Takayanagi, Shinichi Fukuzako, Ichirou Takayama
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Patent number: 6952083Abstract: A drive circuit includes an input node for receiving data and an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes a resistance connected between the source of the second MOS transistor and a source node supplied with a source potential level.Type: GrantFiled: January 14, 2005Date of Patent: October 4, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Shinichi Fukuzako
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Publication number: 20050122051Abstract: A drive circuit includes an input node for receiving data, an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes resistance means connected between the source of the second MOS transistor and a source node supplied with a source potential level.Type: ApplicationFiled: January 14, 2005Publication date: June 9, 2005Inventor: Shinichi Fukuzako
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Patent number: 6897618Abstract: A drive circuit includes an input node for receiving data and an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes a resistance connected between the source of the second MOS transistor and a source node supplied with a source potential level.Type: GrantFiled: January 23, 2004Date of Patent: May 24, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Shinichi Fukuzako
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Patent number: 6774572Abstract: A drive circuit includes an input node for receiving data and an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes a resistance connected between the source of the second MOS transistor and a source node supplied with a source potential level.Type: GrantFiled: October 24, 2002Date of Patent: August 10, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Shinichi Fukuzako
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Publication number: 20040150436Abstract: A drive circuit includes an input node for receiving data, an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes resistance means connected between the source of the second MOS transistor and a source node supplied with a source potential level.Type: ApplicationFiled: January 23, 2004Publication date: August 5, 2004Inventor: Shinichi Fukuzako
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Publication number: 20030080687Abstract: A drive circuit includes an input node for receiving data, an output node. The drive circuit also includes a first MOS transistor of a first conductivity type and a second MOS transistor of the first conductivity type. The first MOS transistor has a source, a drain connected to the output node, and a gate connected to the input node. The second MOS transistor has a source, a drain connected to the source of the first MOS transistor, and a gate supplied with a predetermined potential level. The drive circuit also includes resistance means connected between the source of the second MOS transistor and a source node supplied with a source potential level.Type: ApplicationFiled: October 24, 2002Publication date: May 1, 2003Inventor: Shinichi Fukuzako
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Publication number: 20030043127Abstract: A display device comprises a plurality of first to fourth switching elements. On the basis of control signals from the drive control circuit, the common line is brought to the selected state when the common line is connected to the low-voltage portion for common lines by turning on the first switching element and turning off the second switching element; the common line is brought to the non-selected state when the common line is brought to the high-impedance state by turning off both the first and second switching elements; the data line is brought to the selected state when the data line is connected to the high-voltage portion for data lines by turning off the third switching element and turning on the fourth switching element; and the data line is brought to the non-selected state when the data line is connected to the low-voltage portion for data lines by turning on the third switching element and turning off the fourth switching element.Type: ApplicationFiled: June 18, 2002Publication date: March 6, 2003Inventors: Shinichi Satoh, Shinichi Fukuzako, Junji Kashiwada, Kenji Kokuda
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Patent number: 6441665Abstract: A semiconductor integrated circuit is provided that achieves a lesser degree of inconsistency in the delay time of clock signals that are internally provided. An input clock signal distributed via an input clock supply path is provided to individual timing adjustments circuits. The timing adjustment circuits are each constituted by providing a wiring pattern having serial resistors and gaps in a circuit correction area. The wiring pattern of the semiconductor integrated circuit is corrected by employing a focused ion beam apparatus to achieve an adjustment so that internal input clock signals at the same phase are obtained from the individual timing adjustment circuits. Using the wiring pattern having undergone the adjustment, a semiconductor integrated circuit is manufactured as a product.Type: GrantFiled: June 12, 2000Date of Patent: August 27, 2002Assignee: Oki Electric Industry Co., Ltd.Inventors: Shuichi Hashidate, Shinichi Fukuzako, Tetsuya Tanabe