Patents by Inventor Shinichi Furuta

Shinichi Furuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040102225
    Abstract: In performing outgoing call log display by a cell phone, when display operation is performed in the order of the outgoing call log display state in FIG. 15A→FIG. 15C→FIG. 15B→FIG. 15D, and a clear key is operated in the detailed display state in FIG. 15B, the displays FIG. 15C in accordance with the operation log stored in a buffer instead of directly returning to FIG. 15A. When display operation is performed in the order of FIG. 15A→FIG. 15B→FIG. 15D, and the clear key is operated in FIG. 15B, FIG. 15A is displayed in accordance with the operation log stored in the buffer.
    Type: Application
    Filed: November 18, 2003
    Publication date: May 27, 2004
    Applicant: Casio Computer Co., Ltd.
    Inventors: Shinichi Furuta, Atsushi Honma
  • Patent number: 6618636
    Abstract: A computer system including a built-in speaker, a sound controller configured to receive audio signals, including system warning signals, and configured to supply the received audio signals to the built-in speaker. Also included is a decoder configured to decode digital audio data read from a digital storage media, such as a DVD ROM, and a converter which supplies analog audio signals to the sound controller by converting the decoded audio data. Further, the computer system includes a detector which detects whether the computer system is coupled through a jack to the external audio system, and a transmission prohibiting mechanism which prohibits transmission of the decoded digital audio data to the sound controller when the detector detects the computer system is coupled to the external audio system.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: September 9, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Makoto Sakai, Shinichi Furuta
  • Publication number: 20020024512
    Abstract: A computer system comprises a computer body that is attachable to a user's body. A projection port is formed in the outer surface of a housing of the computer body. The housing contains therein a display element that projects an image outward from the housing through the projection port. The housing further contains therein a vibration detecting element for detecting vibration of the computer body, a discriminating element for determining whether or not the computer body is moving, in accordance with a vibration pattern detected by means of the vibration detecting element, and a main control element adapted to stop the image display by means of the display element when it is concluded by the discriminating element that the computer body is moving.
    Type: Application
    Filed: July 13, 2001
    Publication date: February 28, 2002
    Inventors: Michiyuki Terasawa, Nobutaka Nakamura, Ken Kishida, Shinichi Furuta, Hiroshi Nishibayahi, Tadayuki Matsubara
  • Publication number: 20020015008
    Abstract: A computer can be provided with small-sized, light-weight, and furthermore cableless features by efficiently positioning the components of the computer and display device. The computer system includes a wearable computer and a wearable display device provided independently of this computer. A display controller is installed in the display device, not in the computer. The computer controls the display controller by radio or wire.
    Type: Application
    Filed: July 13, 2001
    Publication date: February 7, 2002
    Inventors: Ken Kishida, Michiyuki Terasawa, Nobutaka Nakamura, Shinichi Furuta, Hiroshi Nishibayashi, Tadayuki Matsubara
  • Patent number: 5878239
    Abstract: When an ISA bus master on an external ISA bus tries to access a device on a PCI bus, a desk station-PCI/ISA (DS-PSI/ISA) bridge device converts a bus cycle on the ISA bus to a PCI bus cycle and commences a transaction for accessing a PCI device. At this time, if the target address-specified by the transaction cannot respond to the transaction and a target retry is generated by the target, the DS-PCI/ISA bridge device activates an I/O channel ready signal (IOCHRDY) on the external ISA bus. The ISA bus master is in a wait state. The DS-PCI/ISA bridge automatically retries the transaction after a predetermined time has elapsed.
    Type: Grant
    Filed: August 29, 1996
    Date of Patent: March 2, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinichi Furuta
  • Patent number: 5857081
    Abstract: While a PCI master on an external bus is executing a transaction on an internal PCI bus, if a bus access request signal (REQ#) output from a PCI device on the internal PCI bus, priority of which is higher than that of the PCI master, is asserted, a PCI bus arbiter deasserts a bus access enable signal (GNT#) corresponding to the PCI master. A request and grant manager informs the PCI master of GNT# by using a serial GNT# through an external PCI bus bridge connected to the internal PCI bus and the external PCI bus. Before the transaction executed by the PCI master ends, when the external PCI bus bridge recognizes that a device on the external PCI bus is a target specified by a transaction of the PCI device as a new bus master, it informs the PCI device of a target retry.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: January 5, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinichi Furuta
  • Patent number: 5794000
    Abstract: After a PCI device has commenced a transaction on an external PCI bus to access a PCI device on an internal PCI bus, an external PCI bus bridge implemented in a DS-PCI/ISA bridge device, connected to the internal PCI bus and the external PCI bus, activates a dummy device selection signal (DEVSEL#) on the external PCI bus in advance. This dummy DEVSEL# is automatically activated, without waiting for a response from the PCI device on internal PCI bus specified by the transaction. If external PCI bus bridge does not receive the response from the PCI device on the internal PCI bus, external PCI bus bridge activates a stop signal (STOP#) on the external PCI bus and the transaction is normally concluded.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: August 11, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinichi Furuta