Abstract: An IC device 4 of the present invention includes a robot arm 6 for conveying IC devices D to a test head 2 for testing the IC devices. The test head 2 includes sockets 3 having placement surfaces 3a onto which the IC devices D are placed and for attaching the IC devices placed on the placement surfaces to the test head. The robot arm 6 includes a contact head 61 for holding the IC devices while the IC devices are conveyed and for pressing the IC devices onto the test head during testing, and a non-contact displacement meter 71 that moves in association with the movement of the contact head 61. The non-contact displacement meter 71 is mounted on the robot arm 6 so as to measure a distance by emitting a beam in a direction perpendicular to the placement surfaces 3a.

Abstract: An IC device 4 of the present invention includes a robot arm 6 for conveying IC devices D to a test head 2 for testing the IC devices. The test head 2 includes sockets 3 having placement surfaces 3a onto which the IC devices D are placed and for attaching the IC devices placed on the placement surfaces to the test head. The robot arm 6 includes a contact head 61 for holding the IC devices while the IC devices are conveyed and for pressing the IC devices onto the test head during testing, and a non-contact displacement meter 71 that moves in association with the movement of the contact head 61. The non-contact displacement meter 71 is mounted on the robot arm 6 so as to measure a distance by emitting a beam in a direction perpendicular to the placement surfaces 3a.

Abstract: A receiving large scale integrated circuit (LSI) device, including a demodulator which includes two signal processing circuits to demodulate two diversity signals to form a demodulated signal, a decoder which decodes the demodulated signal in accordance with an error correcting code to form a decoded signal, a receiving quality judgment circuit which codes the decoded signal to form a re-coded signal as a reference signal, compares the demodulated signal with the reference signal to obtain an error rate of the two diversity signals and supplies a judgment signal depending on the error rate, and a control circuit which selects one of the two signal processing circuits or both two signal processing circuits in response to the judgment signal of the receiving quality judgment circuit and stops supplying electric power or a clock signal to the one of the two processing circuits not selected by the control circuit.

Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.

Abstract: Diversity receiver 100 provided with receiving LSI device 10, antennas 11 and 12, RF circuits 25 and 26 and main CPU 27 is disclosed. Receiving LSI device 10 receives diversity signals through antennas 11 and 12 and RF circuits 25 and 26. One of ADCs 30 and 31 and a part of CDM 32 provided in demodulator 14 are only energized to save electric power consumption when a receiving quality of the diversity signals is acceptable, or both ADCs 30 and 31 and CDM 32 are otherwise fully energized. Bit-interleave circuit 15, Viterbi decoder 17 and receiving-quality-judgment circuit 19 connected in parallel with Viterbi decoder 17 are provided to detect an error rate for the receiving quality judgment. Further, byte-interleave circuit 20, Reed-Solomon decoder 22 and receiving-quality-judgment circuit 24 connected in parallel with Reed-Solomon decoder 22 are also provided to detect another error rate for the receiving quality judgment.

Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.

Abstract: A semiconductor integrated circuit including a first interface circuit, a second interface circuit, a switching circuit. The first interface circuit output a low-level contact mode signal when no power supply voltage is supplied, and to output a high-level contact mode signal when a power supply voltage is supplied. The second interface circuit to output a low-level wireless mode signal when no power supply voltage is supplied, and to output a high-level wireless mode signal when a power supply voltage is supplied. The switching circuit to switch a communication mode to a contact mode in the case of the high-level contact mode signal and the low-level wireless mode detecting signal, and to switch the communication mode to a wireless mode in the case of the low-level contact mode signal and the high-level wireless mode signal.

Abstract: In at least one of a plurality of shutter vanes forming a shutter there are provided a plurality of openings adapted to detect the movement of the shutter vanes. A photointerrupter is turned on and off by the openings when the shutter vanes move. An output voltage of the photointerrupter is compared with a reference voltage by a comparator. A series combination of a switch, which is turned on and off by the output voltage of the comparator, and a resistor is connected between the output of the photointerrupter and ground. The output signal of the comparator is delayed. The delayed version and the output signal of the comparator are exclusive ORed to produce a train of pulses corresponding to the openings as the shutter vanes move. A drive and control section is responsive to the count of the pulses to control the operation of the shutter.