Patents by Inventor Shinichi Imai

Shinichi Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7282452
    Abstract: An organic/inorganic hybrid film represented by SiCx?HyOz (x>0, y?0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: October 16, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
  • Publication number: 20070222294
    Abstract: An underfrequency load shedding protection system for stably managing a power system by recovering a power system frequency to within a predetermined range when the power system frequency drops. An underfrequency level detection unit judges an underfrequency level of the power system frequency when the power system frequency drops resulting from power generation shortage in the power system and a load shedding unit sequentially sheds loads determined in advance based on a staying time when the power system frequency stays at any one of the underfrequency levels judged by the underfrequency level detection unit and sheds on this occasion more loads quickly when the underfrequency level at which the power system frequency stays is large.
    Type: Application
    Filed: April 9, 2004
    Publication date: September 27, 2007
    Inventors: Jirou Tsukida, Tadaaki Yasuda, Shinichi Imai
  • Patent number: 7257457
    Abstract: A plurality of pieces of process data are acquired from a semiconductor production apparatus while it is in operation, and then, a multivariate analysis model is created using at least a portion of the plurality of pieces of process data.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: August 14, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Imai, Masaki Taguchi
  • Publication number: 20070064750
    Abstract: The present invention provides a deep ultraviolet laser apparatus exhibiting high robustness which can generate laser beams in a wavelength region of wavelengths of from 198.3 to 198.8 nm, further may be loaded on a variety of apparatuses as a light source for lighting, and is practicable and a size of the whole structure of thereof is reduced. The deep ultraviolet laser apparatus is arranged in such that laser beams having a wavelength of from 1064 to 1065 nm pulse-output from a first light source is a first fundamental wave; fourth harmonic obtained by wavelength-converting the first fundamental wave by means of a first wave-length conversion means is a second fundamental wave; laser beams having a wavelength of from 1560 to 1570 nm pulse-output from a second light source is a third fundamental wave; second harmonic obtained by wavelength-converting the third fundamental wave by means of a second wave-length conversion means is a fourth fundamental wave; and laser beams having a wavelength of from 198.
    Type: Application
    Filed: September 19, 2006
    Publication date: March 22, 2007
    Inventors: Yushi Kaneda, Yoshiharu Urata, Satoshi Wada, Shinichi Imai
  • Publication number: 20070064223
    Abstract: A pattern inspection apparatus is disclosed, which includes a first laser light source for emission of first laser light having a first wavelength, a second laser light source for emission of second laser light having a second wavelength, and a deep ultraviolet (DUV) light source for emission of DUV light with a wavelength of less than or equal to 266 nm based on the first laser light and the second laser light. A first optical fiber is provided for connecting between the first laser light source and the DUV light source. A second optical fiber is for connection between the second laser light source and the DUV light source. The apparatus also includes a pattern inspection unit with the DUV light source being built therein, for inspecting a workpiece pattern being tested by using the DUV light as illumination light therefor.
    Type: Application
    Filed: December 13, 2005
    Publication date: March 22, 2007
    Applicant: Advanced Mask Inspection Technology Inc.
    Inventor: Shinichi Imai
  • Publication number: 20070064749
    Abstract: In order to generate efficiently a deep ultraviolet laser beam having a wavelength in a deep ultraviolet region and to make the generated laser beam to be high output, it is arranged in such that a laser beam having about 227 nm wavelength is generated by sum-frequency mixing of fourth harmonic of the laser beams obtained by amplifying semiconductor laser beams having 1064.0 to 1065.0 nm wavelengths by means of an optical fiber amplifier, and the laser beams obtained by amplifying semiconductor laser beams having 1557.0 to 1571.0 nm wavelengths by means of another optical fiber amplifier; and further laser beams having 198.4 to 198.7 nm wavelengths are generated by sum-frequency mixing of the above sum-frequency mixed laser beam and the above-described semiconductor laser beams having 1557.0 to 1571.0 nm wavelengths.
    Type: Application
    Filed: September 19, 2006
    Publication date: March 22, 2007
    Inventors: Yushi Kaneda, Yoshiharu Urata, Satoshi Wada, Shinichi Imai
  • Patent number: 7122877
    Abstract: A semiconductor device of the present invention includes a semiconductor substrate including an active region and an isolating region provided so as to enclose the active region; a capacitance insulating film that is provided on the active region and is in contact with the isolating region; an upper electrode provided on the capacitance insulating film so as to be spaced away from the isolating region; an electrode pad provided on the isolating region; a lead conductive film provided over a part of the capacitance insulating film and a part of the isolating region for connecting the upper electrode and the electrode pad; and an interlayer insulating film provided over the substrate.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: October 17, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shinichi Imai
  • Publication number: 20060161288
    Abstract: A method for manufacturing a semiconductor device is provided in which it is possible to perform process control taking account of wafer information and to deal with the process control in which a recipe is change from one wafer to another. The method comprises steps of inserting a process control system into the path of a network where a manufacturing execution system (MES) and a manufacturing apparatus are connected with each other by using a LAN, obtaining a process result on the lot of the wafers at a previous step through the use of the process control system to rewrite the process recipe, and transmitting the rewritten process recipe from the process control system to the manufacturing apparatus. Since the method includes the step of obtaining the process result on the lot effected at the previous step as wafer information, it is possible to calculate a control parameter taking account of the state of the wafers.
    Type: Application
    Filed: December 19, 2005
    Publication date: July 20, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Shinichi Imai
  • Publication number: 20050276908
    Abstract: Liquid supplied from a delivery source of the liquid through a particle filtering unit is discharged onto the surface of a wafer from a discharge nozzle. A particle measurement unit for measuring the number of particulate matters such as bubbles and particles included in the liquid is provided in a pipe that connects the particle filtering unit and the discharge nozzle. There are further provided a data collecting unit for collecting all time a control voltage value of a solenoid control valve that opens/closes the pipe and a measured value of the particle measurement unit, and an arithmetic unit for performing calculation of the measured result of the particle measurement unit. The arithmetic unit calculates the number of particulate matters included in the liquid to be applied on the wafer as a unit and compares the thus calculated number of the particulate matters with a standard value to judge whether or not a thin film coating apparatus is to be stopped.
    Type: Application
    Filed: April 8, 2005
    Publication date: December 15, 2005
    Inventors: Masaki Kitabata, Shinichi Imai
  • Publication number: 20050221599
    Abstract: An organic/inorganic hybrid film represented by SiCxHyOz (x>0, y?0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
    Type: Application
    Filed: May 18, 2005
    Publication date: October 6, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
  • Publication number: 20050196059
    Abstract: An image input apparatus for inputting an image of an object and outputting the image as an electric signal, the image input apparatus comprises a stage which supports the object, a laser interferometer which measures a position of the stage, a light source which emits a pulse light, an illumination optical system which irradiates the object with an illuminating light, a sensor which converts an image-formed optical image into an electric image signal, an imaging optical system which forms an image of the object on the sensor, a synchronization control circuit which controls a light-emission interval of the light source and synchronization of the sensor on the basis of position information of the laser interferometer, a light quantity monitor which measures a quantity of light, and a light quantity correction circuit which corrects the electric image signal on the basis of an output of the light quantity monitor.
    Type: Application
    Filed: February 24, 2005
    Publication date: September 8, 2005
    Inventors: Hiromu Inoue, Tsuneo Terasawa, Shinichi Imai, Takehiko Nomura
  • Publication number: 20050195489
    Abstract: A lens which has a plurality of protrusions and cavities includes a core layer having a cross sectional shape smaller than and similar to a cross sectional shape of the lens; and a skin layer, which covers the core layer, having a smaller storage modulus of elasticity than that of said core layer. The lens may further include a substrate for fixing the core layer on a surface thereof, the substrate having tabular shape being made of a light-transmitting material.
    Type: Application
    Filed: March 3, 2005
    Publication date: September 8, 2005
    Applicant: Arisawa Mfg. Co., Ltd.
    Inventors: Kenichi Watabe, Hiroyuki Shimotsuma, Shinichi Imai
  • Publication number: 20050186794
    Abstract: In a method for fabricating a semiconductor device, interconnect grooves are formed in an insulating film on a substrate, and then a copper film is formed on the insulating film to fill the interconnect grooves. Subsequently, portions of the copper film existing outside the interconnect grooves are polished to form interconnects, and then a cleaning process is performed on the resulting substrate. Thereafter, moisture remaining around a portion of the insulating film exposed between the interconnects is removed in a vacuum.
    Type: Application
    Filed: February 22, 2005
    Publication date: August 25, 2005
    Inventors: Hideki Otsuka, Norishige Aoki, Shinichi Imai
  • Publication number: 20050156211
    Abstract: A semiconductor device of the present invention includes a semiconductor substrate including an active region and an isolating region provided so as to enclose the active region; a capacitance insulating film that is provided on the active region and is in contact with the isolating region; an upper electrode provided on the capacitance insulating film so as to be spaced away from the isolating region; an electrode pad provided on the isolating region; a lead conductive film provided over a part of the capacitance insulating film and a part of the isolating region for connecting the upper electrode and the electrode pad; and an interlayer insulating film provided over the substrate.
    Type: Application
    Filed: March 9, 2005
    Publication date: July 21, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shinichi Imai
  • Patent number: 6881998
    Abstract: A semiconductor device of the present invention includes a semiconductor substrate including an active region and an isolating region provided so as to enclose the active region; a capacitance insulating film that is provided on the active region and has a boundary portion in contact with the isolating region; an upper electrode provided on the capacitance insulating film so as to be spaced away from the isolating region; an electrode pad provided on the isolating region; a lead conductive film provided over a part of the capacitance insulating film and a part of the isolating region for connecting the upper electrode and the electrode pad; and an interlayer insulating film provided over the substrate.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: April 19, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shinichi Imai
  • Patent number: 6856020
    Abstract: A plurality of metal interconnections are formed on a semiconductor substrate. The semiconductor substrate is held on a sample stage in a reactor chamber of a plasma processing apparatus and a material gas containing C5F8, C3F6, or C4F6 as a main component is introduced into the reactor chamber, so that a first fluorine-containing organic film having cavities at positions between the metal interconnections is deposited between the metal interconnections and on the top surfaces of the metal interconnections.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 15, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20050014373
    Abstract: A method for managing a polishing apparatus including downforce detecting means for detecting a downforce applied to a polishing target wafer, includes steps of: calculating a difference between a first downforce detected by the downforce detecting means at a first period at which the polishing apparatus stands by for polishing the wafer, and a second downforce detected by the downforce detecting means at a second period at which the polishing apparatus polishes the wafer, as an actual downforce actually applied to the wafer at the second period; and monitoring the actual downforce.
    Type: Application
    Filed: July 15, 2004
    Publication date: January 20, 2005
    Inventors: Koutaro Miyasaka, Shinichi Imai
  • Publication number: 20050002020
    Abstract: A photolithography mask inspection apparatus has at least two sensors. One sensor is configured to sense light transmitted through an object to be inspected, and the other sensor senses light reflected off the object. A first optical system is arranged to expose a first portion of the object with a first light beam, and a second optical system is arranged to expose a second portion of the object, spaced form the first portion, with a second light beam. A third optical system focuses the transmitted light on to the first sensor, as well as the reflected light on to the second sensor. A defect detecting circuit is also provided to detect a defect of the object, based upon image data associated with the reflected and transmitted light.
    Type: Application
    Filed: May 25, 2004
    Publication date: January 6, 2005
    Inventors: Hiromu Inoue, Toru Tojo, Takehiko Nomura, Shinichi Imai
  • Patent number: 6821885
    Abstract: A method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) forming a plurality of contact holes running through the interlayer insulator film to reach respective ones of the plurality of conductive layers, each of the contact holes having a tapered portion at an upper end thereof; (c) depositing a conductive material film on the interlayer insulator film so as to fill the plurality of contact holes; (d) removing the conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs made of the conductive material film filling the plurality of contact holes; and (e) removing a portion of the interlayer insulator film, which has been exposed in the step (d), so as to remove the tapered portions.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: November 23, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shinichi Imai
  • Patent number: 6787445
    Abstract: A fluorine-containing organic film is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. The fluorine-containing organic film is then exposed to plasma of a rare gas in the same reactor chamber to densify the fluorine-containing organic film.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industry Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai