Patents by Inventor Shinichi Kazui

Shinichi Kazui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010039725
    Abstract: This invention provides a process for manufacturing electronic circuits, according to which soldering can be carried out without using flux by applying a metal surface treatment procedure which allows oxide film, organic matters, carbon or the like on the surface of metal to be easily removed without using complex process nor unfavorably affecting electronic devices or circuit substrates.
    Type: Application
    Filed: June 18, 2001
    Publication date: November 15, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 6269998
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: August 7, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Publication number: 20010000904
    Abstract: A work having a number of solder bumps on a substrate is mounted on a work positioning mechanism, and scanned by an optical micro head to measure errors of a mount posture of the work. Each stage is controlled to correct the errors, and thereafter, the apex positions of the bumps are scanned and measured. The measurement results are collected by a personal computer, and the measurement results together with control data of each axis are sent to a main personal computer and displayed on its screen. An error of an apex position of each bump from a regression plane is calculated, and if the error is smaller than a reference value, the work is judged to be good.
    Type: Application
    Filed: January 8, 2001
    Publication date: May 10, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Yutaka Hashimoto, Hideaki Sasaki, Mamoru Kobayashi, Shinichi Kazui
  • Patent number: 6203655
    Abstract: Electric conductor patterns including antenna coils are formed on one surface of a film. Electronic components are fixed onto the film by a temporary fixing material. A cover film is laminated on the film so that the electrically conductive patterns and the electronic components are covered with the cover film. Simultaneously with the lamination, the electronic components are connected to the electric conductor patterns.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: March 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Fujikawa, Yutaka Hashimoto, Isamu Takaoka, Shinichi Kazui, Hideaki Sasaki, Hitoshi Odashima, Mitsugu Shirai
  • Patent number: 6196441
    Abstract: A method of measuring solder bumps formed on a substrate mounting a semiconductor element thereon includes mounting a work to be measured on a work position mechanism, and scanning the work by an optical micro head to measure errors of a mount posture of the work. Each stage is controlled to correct the errors, and thereafter, the apex positions of the bumps are scanned and measured. The measurement results are collected by a personal computer, and the measurement results together with control data of each axis are sent to a main personal computer and displayed on its screen. An error of an apex position of each bump from a regression plane is calculated, and if the error is smaller than a reference value, the work is judged to be satisfactory.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: March 6, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Hashimoto, Hideaki Sasaki, Mamoru Kobayashi, Shinichi Kazui
  • Patent number: 6161748
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: December 19, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 6137687
    Abstract: In a method for manufacturing a printed circuit board, this printed circuit board can be manufactured by executing a simple manufacturing step within a short time period at in low cost without requiring a complex manufacturing process. A conductive material is pattern-printed on a base board and the printed conductive material is hardened to form a first conductor layer. Subsequently, an insulating material is pattern-printed on the first conductor layer, and the printed insulating material is hardened to thereby form a first insulating layer. A manufacturing step similar to the above-described step is repeatedly performed to thereby form a second conductor layer, a second insulating layer, and a third conductor layer. Furthermore, a manufacturing step similar to the above-explained step is repeatedly performed, so that a printed circuit board having a multi-conductor layer can be manufactured.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: October 24, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Mitsugu Shirai, Shinichi Kazui, Hideaki Sasaki, Keiji Fujikawa, Makoto Matsuoka
  • Patent number: 6133135
    Abstract: The process for manufacturing an electronic circuit includes disposing an electronic device on a circuit substrate and hot melting a solder formed on the electronic device or the circuit substrate to bond the electronic device and the circuit substrate. The process includes the steps of feeding a liquid onto lands on the circuit substrate, aligning and mounting the electronic device on the lands, placing the circuit substrate in a treating vessel and heating the circuit substrate. The heating step includes controlling a pressure of an atmosphere in the treating vessel, hot-melting the solder to prevent at least a portion of the liquid from evaporating until the electronic device and the circuit substrate are bonded and to permit the liquid to evaporate after the electronic device and the circuit substrate are bonded.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: October 17, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 6069701
    Abstract: A method and an apparatus for measuring the height of an apex of an object with high accuracy without influence of the surface state of the object are disclosed. Correlation coefficients of respective positions of a waveform formed from digital data indicative of the height of the object detected by a head portion of a detector and a previously prepared standard waveform are calculated while moving the waveforms in the vertical and horizontal directions and the height of an apex position of the standard waveform at a position having a largest correlation coefficient from the calculated result is decided as the height of the apex of the object. Accordingly, the height of the apex can be decided from the whole detected waveforms without influence of local abnormality of the reflected light quantity waveform due to minute ruggedness or discoloration of the surface of the object.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: May 30, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Hashimoto, Hideaki Sasaki, Shinichi Kazui
  • Patent number: 6017424
    Abstract: A surface reformation method of a high polymer material irradiates an excimer-laser beam to only a predetermined area in which electronic parts and the like are temporarily immobilized by a liquid on a substrate which has a high polymer layer on the surface. The wettability of the liquid for temporary immobilization only with respect to the predetermined area is improved. After the electronic parts are temporarily immobilized on the substrate by using the method, the electronic parts can be durably soldered by fluxless reflow soldering.
    Type: Grant
    Filed: February 23, 1998
    Date of Patent: January 25, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Shibuya, Kaoru Katayama, Mitugu Shirai, Shinichi Kazui, Hideaki Sasaki, Yasuhiro Iwata
  • Patent number: 5968382
    Abstract: A cutting system for cutting a workpiece by laser emission relies upon local cooling of the workpiece at the point at which cutting starts and ends. Optionally, local cooling can also be provided at a cross point where two cutting lines intersect. Relying upon the difference in thermal stress between the laser beam incidence point and the surrounding cooled portion, an initial crack can be generated in a specified direction, whereby the initial crack is propagated to form the desired cutting line. In one embodiment, the cooling is provided by a low temperature solid such as a Peltier cooling plate and the temperature of the workpiece near a point of incidence of the laser beam is determined. The determination can be made by measuring the temperature of a plasma generated near the point of incidence, or by directly measuring the temperature of the portion of the workpiece near the point of incidence.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: October 19, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Matsumoto, Shinichi Kazui, Hideaki Sasaki, Tateoki Miyauchi, Tatsuji Sakamoto
  • Patent number: 5940728
    Abstract: A process for manufacturing electronic circuits, according to which soldering can be carried out without using flux by applying a metal surface treatment procedure which allows oxide film, organic matters, carbon or the like on the surface of metal to be easily removed without using a complex process nor unfavorably affecting electronic devices or circuit substrates. A process of connecting an electronic device and a circuit substrate by means of solder comprises the steps of irradiating the solder with a laser beam to clean the solder, aligning and mounting the electronic device on the circuit substrate, and hot-melting said solder in a low-oxygen content atmosphere to bond the electronic device and the circuit substrate.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: August 17, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Hiroshi Fukuda, Shinichi Kazui, Toshihiko Ohta, Yasuhiro Iwata, Mitsugu Shirai, Mitsunori Tamura
  • Patent number: 5906309
    Abstract: A work having a number of solder bumps on a substrate is mounted on a work positioning mechanism, and scanned by an optical micro head to measure errors of a mount posture of the work. Each stage is controlled to correct the errors, and thereafter, the apex positions of the bumps are scanned and measured. The measurement results are collected by a personal computer, and the measurement results together with control data of each axis are sent to a main personal computer and displayed on its screen. An error of an apex position of each bump from a regression plane is calculated, and if the error is smaller than a reference value, the work is judged to be good.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: May 25, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Hashimoto, Hideaki Sasaki, Mamoru Kobayashi, Shinichi Kazui
  • Patent number: 5832595
    Abstract: A method of modifying an electronic circuit board by performing disconnection or connection of conductive lines at a specified or an arbitrary position of the conductive lines of the electronic circuit board thereby changing an electric circuit and of completely modifying an open pattern defect of the conductive lines or an insulator layer, and its device, wherein a first energy beam is irradiated to portions of repair terminals 9 and 9' which are intended to connect or disconnect, of conductive lines 5 and 5' in the electronic circuit board thereby removing a protection layer, making windows and exposing the terminals 9 and 9' for connection; a second energy beam is irradiated thereby disconnecting the repair terminals 9 and 9', or a metal piece for connecting is supplied to between the repair terminals 9 and 9' and applying an energy thereto thereby electrically connecting them; and the disconnected or connected windowed portion is locally coated with the insulator layer thereby modifying the conductive lin
    Type: Grant
    Filed: June 14, 1994
    Date of Patent: November 10, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Shigenobu Maruyama, Mikio Hongo, Haruhisa Sakamoto, Tateoki Miyauchi, Ryohei Satoh, Kiyoshi Matsui, Shinichi Kazui, Kaoru Katayama, Hiroshi Fukuda
  • Patent number: 5801350
    Abstract: A surface reformation method of a high polymer material irradiates an excimer-laser beam to only a predetermined area in which electronic parts and the like are temporarily immobilized by a liquid on a substrate which has a high polymer layer on the surface. The wettability of the liquid for temporary immobilization only with respect to the predetermined area is improved. After the electronic parts are temporarily immobilized on the substrate by using the method, the electronic parts can be durably soldered by fluxless reflow soldering.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: September 1, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Shibuya, Kaoru Katayama, Mitugu Shirai, Shinichi Kazui, Hideaki Sasaki, Yasuhiro Iwata
  • Patent number: 5551148
    Abstract: A flexible film-like member having conductive metals filled in tapered holes extending through the thickness is positioned such that the holes of the member face to respective pad patterns on a circuit board on which bumps are to be formed, the conductive metals are then heated and fused so that they are joined and transferred to the pad patterns on the circuit board, and the film-like member is then removed by heating or cleaning liquid.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: September 3, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Kazui, Makoto Matsuoka, Hideyuki Fukasawa, Mitsunori Tamura, Mitsugu Shirai, Hideaki Sasaki
  • Patent number: 5520733
    Abstract: A depositing apparatus includes a profile-following mechanism having a translational displacement mechanism portion and a rotation mechanism portion adapted to allow a head to be swung in the directions of both X and the Y axes so that the head follows a profile of the surface of workpiece smoothly around a first contact point, thereof with the workpiece, serving as a fulcrum point.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: May 28, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Doi, Shinichi Kazui, Takeji Shiokawa, Keiji Fujikawa, Yutaka Hashimoto, Makoto Matsuoka
  • Patent number: 5499668
    Abstract: Oxide films, and residues of organic matters, carbons, if any, are removed from a metal surface simply without using complicated steps and without giving adverse effects on electronic parts or electronic devices by irradiating the metal surface with a laser beam of lower energy level than energy capable of changing the metal surface structure, thereby cleaning the metal surface.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: March 19, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Katayama, Shinichi Kazui, Yasuhiro Iwata, Hiroshi Fukuda, Toshihiko Ohta
  • Patent number: 5498109
    Abstract: A drilling method and a drilling apparatus of a hard brittle material in which a core drill is used for abrasive grinding of high accuracy and high durability.
    Type: Grant
    Filed: March 21, 1994
    Date of Patent: March 12, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Toshihiro Mine, Shinichi Kazui, Kenji Morita, Hiroyuki Ogino, Takeji Shiokawa, Hideaki Sasaki
  • Patent number: 5390446
    Abstract: A grinding method and a grinding machine of reduced grinding resistance, in which letting f [mm] denote the diamond particle size of a diamond grindstone, V [m/min] denote the peripheral speed of the diamond grindstone, and f [m/min] denote the feed speed of a workpiece made of Aluminum nitride ceramic, the peripheral speed of the diamond grindstone and the feed speed of the workpiece are set so as to satisfy V.gtoreq.35 .phi.+2000 and V/f.gtoreq.70 .phi.+800.
    Type: Grant
    Filed: June 18, 1992
    Date of Patent: February 21, 1995
    Assignees: Hitachi, Ltd., Hitachi Seiko, Ltd.
    Inventors: Shinichi Kazui, Hiroyuki Ogino, Kenji Morita, Kuninori Imai, Hideaki Sasaki, Takao Oguro