Patents by Inventor Shinichi Kinouchi

Shinichi Kinouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230032035
    Abstract: Provided is a small-sized inexpensive semiconductor module in which increase of ON resistance and increase of turn-off surge voltage at low temperature are suppressed. The semiconductor module includes: a semiconductor switching element; and a stress application portion provided on one or each of a first surface and a second surface on an opposite side to the first surface of the semiconductor switching element, having a linear expansion coefficient larger than that of a main material of the semiconductor switching element, and having a larger thickness than the semiconductor switching element. The stress application portion generates compressive or tensile stress in the semiconductor switching element through thermal shrinkage or expansion of the stress application portion due to change in temperature. A threshold voltage at which the semiconductor switching element is turned on, decreases in association with increase of a magnitude of the compressive or tensile stress in the semiconductor switching element.
    Type: Application
    Filed: March 18, 2022
    Publication date: February 2, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideyuki HATTA, Shinichi KINOUCHI, Hayato NAKATA
  • Patent number: 10580754
    Abstract: In a semiconductor module, first and second semiconductor chips each include a transistor and a temperature-detecting diode connected between first and second control pads. The first control pad of the first semiconductor chip is connected to a first control terminal, the second control pad of the first semiconductor chip and the first control pad of the second semiconductor chip are connected to a second control terminal, and the second control pad of the second semiconductor chip is connected to a third control terminal.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: March 3, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinya Yano, Shinichi Kinouchi, Yasushi Nakayama
  • Publication number: 20190051640
    Abstract: In a semiconductor module, first and second semiconductor chips each include a transistor and a temperature-detecting diode connected between first and second control pads. The first control pad of the first semiconductor chip is connected to a first control terminal, the second control pad of the first semiconductor chip and the first control pad of the second semiconductor chip are connected to a second control terminal, and the second control pad of the second semiconductor chip is connected to a third control terminal.
    Type: Application
    Filed: March 13, 2017
    Publication date: February 14, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinya YANO, Shinichi KINOUCHI, Yasushi NAKAYAMA
  • Patent number: 9270193
    Abstract: A power semiconductor module includes an element pair formed by connecting, in anti-parallel to each other, an IGBT and an FWD group in which an FWD, a voltage drop characteristic of which during conduction has a negative temperature coefficient, and an FED, a voltage drop characteristic of which during conduction has a positive temperature coefficient, are connected in series and an element pair formed by connecting, in anti-parallel to each other, an IGBT and an FWD group in which a FWD, a voltage drop characteristic of which during conduction has a negative temperature coefficient, and an FWD, a voltage drop characteristic of which during conduction has a positive temperature coefficient, are connected in series. The element pairs are connected in parallel.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: February 23, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Tanaka, Shinichi Kinouchi
  • Patent number: 9024564
    Abstract: The invention provides a drive control device that comprises: inverters that are connected to a motor; a variable resistive element that is connected between the motor and each of the inverters; a current/voltage detection device connected between the motor and each of the inverters; and a controller that, when detecting a fault of an inverter that drives the motor based on a detection signal from the current/voltage detection device, gradually increases a resistance value of a variable resistive element provided between the faulty inverter and the motor at a velocity of a resistance variation such that a surge voltage has a voltage value for which the variable resistive element and the motor are not damaged, and executes drive control of the motor by a normal inverter other than the faulty inverter.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: May 5, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinichi Kinouchi, Kosuke Nakano
  • Patent number: 8785931
    Abstract: A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: July 22, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinichi Kinouchi, Hiroshi Nakatake, Yuji Ebiike, Akihiko Furukawa, Masayuki Imaizumi
  • Publication number: 20140077745
    Abstract: The invention provides a drive control device that comprises: inverters that are connected to a motor; a variable resistive element that is connected between the motor and each of the inverters; a current/voltage detection device connected between the motor and each of the inverters; and a controller that, when detecting a fault of an inverter that drives the motor based on a detection signal from the current/voltage detection device, gradually increases a resistance value of a variable resistive element provided between the faulty inverter and the motor at a velocity of a resistance variation such that a surge voltage has a voltage value for which the variable resistive element and the motor are not damaged, and executes drive control of the motor by a normal inverter other than the faulty inverter.
    Type: Application
    Filed: March 27, 2013
    Publication date: March 20, 2014
    Inventors: Shinichi KINOUCHI, Kosuke NAKANO
  • Patent number: 8598920
    Abstract: A gate driving circuit for driving a voltage-driven switching device is provided with a current limiting circuit for limiting a gate current ig that flows into a gate terminal through a gate resistor at turn-on to a current limit value IL which defines an upper limit value. The current limit value IL is set at a value which is larger than a gate current value I2 at turn-on of the switching device during a period when the Miller effect occurs but is smaller than a gate current value I1 at a point in time when a main current begins to flow at turn-on in a case where the gate current ig is not limited by the current limiting circuit. This arrangement makes a variation in a collector current of the switching device moderate at turn-on thereof when the collector current begins to flow, thereby reducing high-frequency noise.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: December 3, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Nakatake, Shinichi Kinouchi, Tatsuya Kitamura
  • Publication number: 20130153900
    Abstract: A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.
    Type: Application
    Filed: August 26, 2011
    Publication date: June 20, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinichi Kinouchi, Hiroshi Nakatake, Yuji Ebiike, Akihiko Furukawa, Masayuki Imaizumi
  • Publication number: 20120326646
    Abstract: A power semiconductor module includes an element pair formed by connecting, in anti-parallel to each other, an IGBT and an FWD group in which an FWD, a voltage drop characteristic of which during conduction has a negative temperature coefficient, and an FED, a voltage drop characteristic of which during conduction has a positive temperature coefficient, are connected in series and an element pair formed by connecting, in anti-parallel to each other, an IGBT and an FWD group in which a FWD, a voltage drop characteristic of which during conduction has a negative temperature coefficient, and an FWD, a voltage drop characteristic of which during conduction has a positive temperature coefficient, are connected in series. The element pairs are connected in parallel.
    Type: Application
    Filed: October 29, 2010
    Publication date: December 27, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Tanaka, Shinichi Kinouchi
  • Publication number: 20120013371
    Abstract: A gate driving circuit for driving a voltage-driven switching device is provided with a current limiting circuit for limiting a gate current ig that flows into a gate terminal through a gate resistor at turn-on to a current limit value IL which defines an upper limit value. The current limit value IL is set at a value which is larger than a gate current value I2 at turn-on of the switching device during a period when the Miller effect occurs but is smaller than a gate current value I1 at a point in time when a main current begins to flow at turn-on in a case where the gate current ig is not limited by the current limiting circuit. This arrangement makes a variation in a collector current of the switching device moderate at turn-on thereof when the collector current begins to flow, thereby reducing high-frequency noise.
    Type: Application
    Filed: May 7, 2010
    Publication date: January 19, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi Nakatake, Shinichi Kinouchi, Tatsuya Kitamura
  • Patent number: 7948277
    Abstract: A drive circuit wherein any abnormality of a semiconductor element is prevented from being erroneously sensed in a case where a gate “ON” command has entered in a state in which a gate voltage of the semiconductor element has not lowered fully. A detection process for a controlled variable of the semiconductor element is permitted only within a period which corresponds to a controlled variable of the semiconductor element at the time when an “ON” signal has been inputted to a control circuit, and a detected controlled variable which is detected within the period and a comparison controlled variable which is set in correspondence with the controlled variable are compared so as to output an abnormality signal, whereby the semiconductor element is turn-off at a speed lower than in normal turn-off.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: May 24, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Nakatake, Satoshi Ishibashi, Shinsuke Idenoue, Takeshi Oi, Shinichi Kinouchi, Takeshi Horiguchi
  • Publication number: 20100231269
    Abstract: A drive circuit wherein any abnormality of a semiconductor element is prevented from being erroneously sensed in a case where a gate “ON” command has entered in a state in which a gate voltage of the semiconductor element has not lowered fully. A detection process for a controlled variable of the semiconductor element is permitted only within a period which corresponds to a controlled variable of the semiconductor element at the time when an “ON” signal has been inputted to a control circuit, and a detected controlled variable which is detected within the period and a comparison controlled variable which is set in correspondence with the controlled variable are compared so as to output an abnormality signal, whereby the semiconductor element is turn-off at a speed lower than in normal turn-off.
    Type: Application
    Filed: April 4, 2007
    Publication date: September 16, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi Nakatake, Satoshi Ishibashi, Shinsuke Idenoue, Takeshi Oi, Shinichi Kinouchi, Takeshi Horiguchi
  • Patent number: 6236559
    Abstract: A capacitor comprising a metal oxide dielectric film deposited by chemical vapor deposition includes dissolving at least one organometallic CVD precursor compound in a solvent system including tetrahydrofuran to form a liquid solution; vaporizing the liquid solution including the at least one organometallic compound; and forming the metal oxide dielectric thin film by depositing at least a portion of the at least one organometallic compound from the vaporized solution on a substrate.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: May 22, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fusaoki Uchikawa, Shigeru Matsuno, Shinichi Kinouchi, Hisao Watarai
  • Patent number: 6215185
    Abstract: An object is to obtain long-term reliability of an electric connection in a power semiconductor module. In a power semiconductor module, the main circuit interconnection directly connected to a power semiconductor chip (3) is formed of a busbar (6) and the power semiconductor chip (3) and the busbar electrode (6a) of the busbar (6) are electrically connected through a conductive resin (12). A member (13) having lower thermal expansion than the busbar electrode (6a) is joined to the busbar electrode (6a) in the part adjacent to said power semiconductor chip (3).
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: April 10, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takumi Kikuchi, Hirofumi Fujioka, Toshiyuki Kikunaga, Hirotaka Muto, Shinichi Kinouchi, Osamu Usui, Takeshi Ohi
  • Patent number: 6212059
    Abstract: A capacitor for memory devices including a barium strontium titanate system dielectric film, the film being formed from a chemical vapor deposition source material including a liquid solution of respective organometallic compounds of barium, strontium, and titanium dissolved in tetrahydrofuran.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: April 3, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fusaoki Uchikawa, Shigeru Matsuno, Shinichi Kinouchi, Hisao Watarai
  • Patent number: 6103002
    Abstract: The multi-source raw material are dissolved in the tetra-hydrofuran, in a liquid state and evaporated simultaneously and stably transported to the reactor, thereby the dielectric thin film used for capacitor having a good performance is formed with a good repeatability. The present invention provides CVD raw material for oxide-system dielectric thin film wherein organic metal raw material is dissolved in the tetra-hydrofuran and the metal atom of the organic metal raw material is selected at least among Pb, Ti, Zr or alkaline earth metal. As a result, a stable dielectric thin film can be formed by CVD method and the dielectric thin film can be used for a capacitor for memory devices.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: August 15, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fusaoki Uchikawa, Shigeru Matsuno, Shinichi Kinouchi, Hisao Watarai
  • Patent number: 6063443
    Abstract: The multi-source raw material are dissolved in the tetra-hydrofuran, in a liquid state and evaporated simultaneously and stably transported to the reactor, thereby the dielectric thin film used for capacitor having a good performance is formed with a good repeatability. The present invention provides CVD raw material for oxide-system dielectric thin film wherein organic metal raw material is dissolved in the tetra-hydrofuran and the metal atom of the organic metal raw material is selected at least among Pb, Ti, Zr or alkaline earth metal. As a result, a stable dielectric thin film can be formed by CVD method and the dielectric thin film can be used for a capacitor for memory devices.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: May 16, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fusaoki Uchikawa, Shigeru Matsuno, Shinichi Kinouchi, Hisao Watarai
  • Patent number: 5555154
    Abstract: The multi-source raw material are dissolved in the tetra-hydrofuran, in a liquid state and evaporated simultaneously and stably transported to the reactor, thereby the dielectric thin film used for capacitor having a good performance is formed with a good repeatability. The present invention provides CVD raw material for oxide-system dielectric thin film wherein organic metal raw material is dissolved in the tetra-hydrofuran and the metal atom of the organic metal raw material is selected at least among Pb, Ti, Zr or alkaline earth metal. As a result, a stable dielectric thin film can be formed by CVD method and the dielectric thin film can be used for a capacitor for memory devices.
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: September 10, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fusaoki Uchikawa, Shigeru Matsuno, Shinichi Kinouchi, Hisao Watarai
  • Patent number: 5413981
    Abstract: A method for manufacturing the oxide superconductor according to the present invention comprises the steps of: mixing a starting material including Bi, Sr, Ca and Cu such that a mole ratio of Bi, Sr, Ca and Cu is 2:2+a:1+b:2+c, wherein a.gtoreq.0, b.gtoreq.0, c.gtoreq.0, and 0<a+b+c<3; melting the mixed material at a temperature of 900.degree. C.-1500.degree. C.; quenching rapidly the molten material; and annealing the quenched material at a partial molten temperature of 800.degree. C.-1000.degree. C. This method gives product wherein a precipitate of at least one compound in the group SrO, CuO and (Ca.sub.1-x Sr.sub.x).sub.2 CuO.sub.3 (wherein 0.gtoreq.x<1) is finely dispersed in the superconducting crystal of Bi.sub.2 Sr.sub.2 Ca.sub.1 Cu.sub.2 O.sub.y (wherein y is about 8). The precipitates act as flux pinning centers.
    Type: Grant
    Filed: July 19, 1993
    Date of Patent: May 9, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kunihiko Egawa, Toshio Umemura, Shinichi Kinouchi, Mitsunobu Wakata, Shin Utsunomiya, Ayumi Nozaki