Abstract: A copper alloy plate containing in a center part of a plate thickness direction more than 2.0% (% by mass) and 32.5% or less of Zn; 0.1% or more and 0.9% or less of Sn; 0.05% or more and less than 1.0% of Ni; 0.001% or more and less than 0.1% of Fe, and 0.005% or more and 0.1% or less of P; and the balance Cu, including a surface layer part in which a surface Zn concentration in a surface is 60% or less of a center Zn concentration in the center part, having a depth from the surface to where Zn concentration is 90% of the center Zn concentration; and in the surface layer, the Zn concentration increases from the surface toward the center part in the plate thickness direction at a concentration gradient of 10% by mass/?m or more and 1000% by mass/?m or less.

Abstract: Providing a copper alloy plate, in which center Mg concentration at a center part in a plate thickness direction 0.1 mass % or more and less than 0.3 mass %, center P concentration is 0.001 mass % or more and 0.2 mass % or less, and the balance is composed of Cu and inevitable impurities; in which surface Mg concentration at a surface is 70% or less of the center Mg concentration; in which a surface layer part defined by a prescribed thickness from the surface has a concentration gradient of Mg of 0.05 mass %/?m or more and 5 mass %/?m or less increasing from surface toward center part of the plate thickness direction; and in which restraint of color change of the surface and increase of electrical contact resistance, and adhesiveness of a plating film are excellent due to maximum Mg concentration in the surface layer part is 90% of the center Mg concentration.

Abstract: A semiconductor integrated circuit device with a complementary type internal logic function element used as a master slice type gate array LSI is disclosed having two transmission gates. A plurality of pairs of transistors are utilized with each pair comprising a first conductivity type transistor and a second conductivity type transistor. A first transmission gate is constructed with the first conductivity type transistor of one pair of transistors out of two pairs of these transistor pairs and the second conductivity type transistor of the other pair. Second transmission gate is constructed with the first conductivity type transistor of the other transistor pair and the second conductivity type transistor of the first transistor pair so that an area required for constructing the two transmission gates is reduced in order to increase the degree of integration.