Abstract: A drive circuit 100 includes an internal counter 301 within its data driver N. The internal counter 301 is reset when a first data driver 1 reads the first signal of display data. A cascade signal (CASCADE) is input from a previous stage of the data driver N?1. When the counter value becomes equal to a first set value, the internal counter 301 is reset and the current stage of the data driver starts to read display data. When the counter value becomes equal to a second set value calculated by Expression (1), a counter unit 300 supplies a cascade signal to a subsequent stage of the data driver N+1.