Abstract: Nucleic acid detecting sensor includes field-effect transistor, detector which detects target nucleic acid molecules having sequences from sample based on degree of a variation in threshold voltage of field-effect transistor, and at least one nucleic acid probe molecule which is hybridized with corresponding one of target nucleic acid molecules, and is immobilized on gate of field-effect transistor, wherein gate width of field-effect transistor is of order of length obtained by expression given below (?0?rkBT/e2n)1/2 where ?0 is dielectric constant of vacuum, ?r is relative dielectric constant of channel region, kB is Boltzmann constant, T is absolute temperature of the channel region, e is elementary charge, and n is equilibrium carrier density in the channel region in field-effect transistor where channel is formed.

Abstract: A parallel processor including two processor element groups each configured to simultaneously execute arithmetic operations for states of all logical values expressable by N bits (N is a natural number) and retain results of the arithmetic operation to execute an arithmetic operation equivalent to N qubits; and an exchange unit for data exchange between the two processor element groups. The two processor element groups are each configured to execute an arithmetic operation equivalent to N qubits are connected to each other via the exchange unit to constitute a processor element group configured to execute an arithmetic operation equivalent to (N+1) qubits with 1 qubit extension, and consequently, it becomes possible to execute a large-scale arithmetic operation at high speed without any increase in the time and effort required for designing an integrated circuit for executing the large-scale arithmetic operation.

Abstract: The present invention includes a plurality of working electrodes on which the same type of nucleic acid probes each having a nucleic acid complementary to a target nucleic acid are immobilized and which have different sensor areas and a normalization circuit which normalizes detection signals obtained by the working electrodes with respect to the respective sensor areas.

Abstract: A parallel processor includes: two processor element groups each configured to simultaneously execute arithmetic operations for states of all logical values expressable by N bits (N is a natural number) and retain results of the arithmetic operation to execute an arithmetic operation equivalent to N qubits; and an exchange unit for data exchange between the two processor element groups, and the two processor element groups each configured to execute an arithmetic operation equivalent to N qubits are connected to each other via the exchange unit to constitute a processor element group configured to execute an arithmetic operation equivalent to (N+1) qubits with 1 qubit extension, and consequently, it becomes possible to execute a large-scale arithmetic operation at high speed without any increase in the time and effort required for designing an integrated circuit for executing the large-scale arithmetic operation.