Patents by Inventor Shinichi Sasaki

Shinichi Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230250332
    Abstract: A fluorescent material has a core-shell structure. The core contains a crystal phase of an inorganic compound having Formula: MxMgaAlyOzNw (A); M represents a metal; x satisfies 0.001?x?0.3; a satisfies 0?a?1.0?x; y satisfies 1.2?y?11.3; z satisfies 2.8?z?18; and w satisfies 0?w?1.0. The shell is formed on at least a part of a surface of the core and contains boron and/or silicon. The core has a tetrahedral site occupancy of M1 of 0.032 or more and a specific surface area of 0.01 to 4.1 m2/g. A ratio Y/X of a peak area value Y of boron or silicon to a peak area value X of M present in the shell satisfies 0<Y/X?0.095 when EDX measurement of a cross section of the fluorescent material is performed.
    Type: Application
    Filed: July 12, 2021
    Publication date: August 10, 2023
    Inventors: Masaki KANNAMI, Kentaro IWASAKI, Shota NAITO, Yoji MATSUO, Shinichi SASAKI
  • Publication number: 20230128381
    Abstract: A coated particle having excellent thermal expansion control and electrical insulation properties includes a core of a first inorganic compound containing a metal or semimetal element P; and a shell of a second inorganic compound containing a metal or semimetal element Q. The first inorganic compound satisfies 1, and the coated particles satisfy 2 and 3. 1: |dA(T)/dT| is ?10 ppm/°C at T1 of -200° C. to 1,200° C. A is (an a-axis lattice constant of a crystal in the first inorganic compound)/(a c-axis lattice constant of a crystal in the first inorganic compound). 2: in XPS of a surface of each of the coated particles, a ratio of a number of atoms of Q contained in the shell to a number of atoms of P contained in the core t is 45 to 300. 3: an average particle diameter of each coated particle is 0.1 to 100 µm.
    Type: Application
    Filed: April 7, 2021
    Publication date: April 27, 2023
    Inventors: Shinichi SASAKI, Atsunori DOI, Takashi ARIMURA, Satoshi SHIMANO
  • Publication number: 20230104406
    Abstract: A ceramic electronic component includes: a ceramic body including main surfaces perpendicular to a first axis and end surfaces perpendicular to a second axis; and external electrodes covering the end surfaces and extending from the end surfaces to the main surfaces. The external electrode includes a surface layer portion including a Sn plating layer, and an inner layer portion including a Ni plating layer adjacent to the Sn plating layer and including rounded inner end portions on the main surfaces. In a cross-section perpendicular to a third axis, a ratio t2/t1 is 0.4 or more, where t2 is a thickness in the first axis direction of a portion where an inclination of a tangent line of an outer surface of the inner end portion to each main surface is 45°, and t1 is a maximum thickness in the first axis direction of the inner layer portion on each main surface.
    Type: Application
    Filed: August 12, 2022
    Publication date: April 6, 2023
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Eriko NUMATA, Daisuke IWAI, Shinichi SASAKI, Fumi MORI
  • Publication number: 20230086815
    Abstract: A multi-layer ceramic electronic component includes a ceramic body and an external electrode. The ceramic body includes a plurality of internal electrodes laminated in one axial direction, and an end surface extending along a plane parallel to the axial direction, at least part of the plurality of internal electrode being drawn from the end surface. The external electrode covers the end surface of the ceramic body. In a thermal desorption spectrum of water of the multi-layer ceramic electronic component by thermal desorption spectroscopy, a ratio P1/P2 of a detection intensity P1 of a first peak in a range of 200° C. to 300° C. to a detection intensity P2 of a second peak in a range of 550° C. to 800° C. is equal to or lower than 11.
    Type: Application
    Filed: August 24, 2022
    Publication date: March 23, 2023
    Inventors: Fumi MORI, Daisuke IWAI, Shinichi SASAKI
  • Patent number: 11561297
    Abstract: A thermal excitation acoustic-wave-generating device includes a first heating element, a substrate that includes a main surface along which the first heating element is disposed, and a facing body that faces the substrate with the first heating element interposed therebetween. The substrate and the facing body define a path for an acoustic wave. A length of the path is close to a whole number multiple of ¼ of a wavelength of the acoustic wave.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: January 24, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinichi Sasaki, Takaaki Asada
  • Patent number: 11350223
    Abstract: A thermal excitation acoustic-wave-generating device includes a first acoustic wave source that includes a first heating element and a substrate that includes a main surface along which the first heating element is disposed, a second acoustic wave source that includes a second heating element and a facing body that includes a main surface along which the second heating element is disposed, and a pair of electrodes connected to the first and second heating elements. The first and second acoustic wave sources are arranged such that the first and second heating elements are separated from each other and face each other. The pair of electrodes are disposed between the first and second acoustic wave sources.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: May 31, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinichi Sasaki, Takaaki Asada
  • Publication number: 20210408363
    Abstract: A low-profile ultrasonic wave generation device is provided that includes a drive unit having a piezoelectric member and an electrode formed on a surface of the piezoelectric member. The drive unit as a whole vibrates flexurally. The connection member is connected to a portion of the drive unit that includes a point of maximum displacement of the drive unit when the drive unit is subjected to flexural vibration. The vibrating unit is connected to the connection member. The vibrating unit vibrates due to the flexural vibration of the drive unit being transmitted by the connection member and thereby generates ultrasonic waves.
    Type: Application
    Filed: September 13, 2021
    Publication date: December 30, 2021
    Inventors: Takaaki Asada, Motonori Nakamura, Shinichi Sasaki
  • Publication number: 20210089885
    Abstract: According to one embodiment, a training device includes a first memory, a second memory, and a processing circuit. The first memory is a memory accessible at a higher speed than the second memory. The training device executes a training process of a machine learning model using a stochastic gradient descent method. The processing circuit stores a first output produced by the process of a first layer in the second memory, and stores a second output produced by the process of a second layer, in a forward process of the training process. The processing circuit updates a parameter of the second layer based on the second output stored in the first memory, reads the first output stored in the second memory, and updates a parameter of the first layer based on the read first output, in a backward process of the training process.
    Type: Application
    Filed: March 6, 2020
    Publication date: March 25, 2021
    Applicant: Kioxia Corporation
    Inventors: Daisuke MIYASHITA, Jun DEGUCHI, Asuka MAKI, Fumihiko TACHIBANA, Shinichi SASAKI, Kengo NAKATA
  • Patent number: 10910043
    Abstract: According to one embodiment, a semiconductor memory device includes a memory, a controller, and a sense amplifier. The memory includes a plurality of memory cells, wherein each of the memory cells can store a multi level indicating one data. The controller writes the multi level to one cell of the memory. The sense amplifier performs unary read of data from the multi level written in the one cell. The data is data in which an error of a predetermined lower significant bit is allowed. The controller reads data indicated by the multi level stored in the one cell of the memory from the sense amplifier.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: February 2, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shinichi Sasaki, Daisuke Miyashita, Jun Deguchi
  • Publication number: 20200304924
    Abstract: A thermal excitation acoustic-wave-generating device includes a first acoustic wave source that includes a first heating element and a substrate that includes a main surface along which the first heating element is disposed, a second acoustic wave source that includes a second heating element and a facing body that includes a main surface along which the second heating element is disposed, and a pair of electrodes connected to the first and second heating elements. The first and second acoustic wave sources are arranged such that the first and second heating elements are separated from each other and face each other. The pair of electrodes are disposed between the first and second acoustic wave sources.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 24, 2020
    Inventors: Shinichi SASAKI, Takaaki ASADA
  • Publication number: 20200292683
    Abstract: A thermal excitation acoustic-wave-generating device includes a first heating element, a substrate that includes a main surface along which the first heating element is disposed, and a facing body that faces the substrate with the first heating element interposed therebetween. The substrate and the facing body define a path for an acoustic wave. A length of the path is close to a whole number multiple of ¼ of a wavelength of the acoustic wave.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 17, 2020
    Inventors: Shinichi SASAKI, Takaaki ASADA
  • Publication number: 20200219560
    Abstract: According to one embodiment, a semiconductor memory device includes a memory, a controller, and a sense amplifier. The memory includes a plurality of memory cells, wherein each of the memory cells can store a multi level indicating one data. The controller writes the multi level to one cell of the memory. The sense amplifier performs unary read of data from the multi level written in the one cell. The data is data in which an error of a predetermined lower significant bit is allowed. The controller reads data indicated by the multi level stored in the one cell of the memory from the sense amplifier.
    Type: Application
    Filed: August 30, 2019
    Publication date: July 9, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Shinichi SASAKI, Daisuke MIYASHITA, Jun DEGUCHI
  • Patent number: 10561081
    Abstract: A fertigation system comprises: a controller that transmits sensor data to a fertigation control server, and that controls a water supply valve, a culture stock solution supply valve, and a discharge valve on the basis of received data; and a fertigation control server that, on the basis of the sensor data received from the controller, calculates control amounts for the water supply valve, the culture stock solution supply valve, and the discharge valve, and returns the control amounts to the controller.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 18, 2020
    Assignees: Routrek Networks, Inc., MEIJI UNIVERSITY
    Inventors: Kiyoshi Ozawa, Shunrokuro Fujiwara, Shinichi Sasaki, Eiji Kita, Hironao Tokitsu, Hiroshi Taketazu
  • Publication number: 20200026998
    Abstract: According to one embodiment, an information processing apparatus for convolution operations in layers of a convolutional neural network, includes a memory and a product-sum operating circuitry. The memory is configured to store items of information indicative of an input, a weight to the input, and a bit width determined for each filter of the weight. The product-sum operating circuitry is configured to perform a product-sum operation based on the items of information indicative of the input, the weight, and the bit width, stored in the memory.
    Type: Application
    Filed: March 4, 2019
    Publication date: January 23, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Asuka MAKI, Daisuke Miyashita, Kengo Nakata, Fumihiko Tachibana, Jun Deguchi, Shinichi Sasaki
  • Patent number: 9991421
    Abstract: According to one embodiment, a method for manufacturing an LED device includes forming a laminated semiconductor layer including a GaN layer of a first conductivity type, a GaN-based luminous layer, and a GaN layer of a second conductivity type stacked in this order on a surface of a substrate, forming a resist pattern on the laminated semiconductor layer, subjecting the laminated semiconductor layer to reactive ion etching using the resist pattern as a mask to selectively remove the laminated semiconductor layer to form an LED element structure part and an electrode connection region, removing the resist pattern, and treating the substrate including the LED element structure part and the electrode connection region with a first etching residue removing aqueous solution.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: June 5, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ikuo Uematsu, Makoto Saito, Shinya Ito, Kengo Furutani, Shinichi Sasaki
  • Publication number: 20180103596
    Abstract: A fertigation system comprises: a controller that transmits sensor data to a fertigation control server, and that controls a water supply valve, a culture stock solution supply valve, and a discharge valve on the basis of received data; and a fertigation control server that, on the basis of the sensor data received from the controller, calculates control amounts for the water supply valve, the culture stock solution supply valve, and the discharge valve, and returns the control amounts to the controller.
    Type: Application
    Filed: March 29, 2016
    Publication date: April 19, 2018
    Applicants: Routrek Networks, Inc., MEIJI UNIVERSITY
    Inventors: Kiyoshi OZAWA, Shunrokuro FUJIWARA, Shinichi SASAKI, Eiji KITA, Hironao TOKITSU, Hiroshi TAKETAZU
  • Publication number: 20180026159
    Abstract: According to one embodiment, a method for manufacturing an LED device includes forming a laminated semiconductor layer including a GaN layer of a first conductivity type, a GaN-based luminous layer, and a GaN layer of a second conductivity type stacked in this order on a surface of a substrate, forming a resist pattern on the laminated semiconductor layer, subjecting the laminated semiconductor layer to reactive ion etching using the resist pattern as a mask to selectively remove the laminated semiconductor layer to form an LED element structure part and an electrode connection region, removing the resist pattern, and treating the substrate including the LED element structure part and the electrode connection region with a first etching residue removing aqueous solution.
    Type: Application
    Filed: July 14, 2017
    Publication date: January 25, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ikuo UEMATSU, Makoto Saito, Shinya Ito, Kengo Furutani, Shinichi Sasaki
  • Patent number: D871494
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: December 31, 2019
    Assignee: Hoya Corporation
    Inventors: Kazumi Yamada, Tadayuki Yoshida, Shinichi Sasaki
  • Patent number: D938910
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: December 21, 2021
    Assignee: TDK CORPORATION
    Inventors: Shohei Abe, Satoshi Sugimoto, Tomoaki Nonaka, Shinichi Sasaki
  • Patent number: D949790
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: April 26, 2022
    Assignee: TDK CORPORATION
    Inventors: Shohei Abe, Satoshi Sugimoto, Tomoaki Nonaka, Shinichi Sasaki