Abstract: Disclosed is an inventive diode which can reduce a stray capacity to improve various characteristics thereof, in which a dielectric layer, a conductive layer and a second dielectric layer are respectively formed by deposition in this order on an upper face of a semiconductor substrate excluding a central portion of an exposed surface of a P-type region. Then, an anode side electrode is formed extending from the exposed surface of the P-type region to the upper face of the second dielectric layer, and is electrically connected with the P-type region. Herein, the conductive layer is formed such that it is isolated from the electrode by the second dielectric layer, is connected with the semiconductor substrate upper face in a location where the dielectric layer has not been formed, and partially resides in a location sandwiched between the electrode and the semiconductor substrate.

Abstract: Disclosed is an inventive diode which can reduce a stray capacity to improve various characteristics thereof, in which a dielectric layer, a conductive layer and a second dielectric layer are respectively formed by deposition in this order on an upper face of a semiconductor substrate excluding a central portion of an exposed surface of a P-type region. Then, an anode side electrode is formed extending from the exposed surface of the P-type region to the upper face of the second dielectric layer, and is electrically connected with the P-type region. Herein, the conductive layer is formed such that it is isolated from the electrode by the second dielectric layer, is connected with the semiconductor substrate upper face in a location where the dielectric layer has not been formed, and partially resides in a location sandwiched between the electrode and the semiconductor substrate.