Patents by Inventor Shinichi Shinozuka

Shinichi Shinozuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220415673
    Abstract: A bonding system includes a bonding device, an inspection device and a controller. The bonding device forms a combined substrate by bonding a first substrate and a second substrate to each other. The inspection device inspects the combined substrate. The controller controls the inspection device. The controller includes a measurement controller, a comparison unit and a re-measurement controller. The measurement controller causes the inspection device to measure the combined substrate at a first number of measurement points. The comparison unit compares, with a reference, an inspection result including a deviation amount between the first substrate and the second substrate in the combined substrate based on a measurement result. The re-measurement controller causes the inspection device to re-measure the combined substrate at a second number of measurement points greater than the first number of measurement points based on a comparison result obtained by the comparison unit.
    Type: Application
    Filed: September 28, 2020
    Publication date: December 29, 2022
    Inventors: Yoshitaka Otsuka, Shigeto Tsuruta, Yuji Mimura, Hiroshi Maeda, Eiji Manabe, Hisanori Hizume, Shinichi Shinozuka, Hironori Tanoue
  • Publication number: 20220254636
    Abstract: A bonding apparatus configured to bond a first substrate and a second substrate includes a first holder configured to hold the first substrate; a second holder configured to hold the second substrate; a first imaging device provided at the first holder and configured to image the second substrate held by the second holder; a first light irradiating device provided at the first holder and configured to irradiate light to the second substrate when the second substrate is imaged; a second imaging device provided at the second holder and configured to image the first substrate held by the first holder; and a second light irradiating device provided at the second holder and configured to irradiate light to the first substrate when the first substrate is imaged. Each of the first light irradiating device and the second light irradiating device is connected to a first light source configured to irradiate white light.
    Type: Application
    Filed: April 28, 2022
    Publication date: August 11, 2022
    Inventors: Toshifumi Inamasu, Shinichi Shinozuka
  • Patent number: 11348791
    Abstract: A bonding apparatus configured to bond a first substrate and a second substrate includes a first holder configured to hold the first substrate; a second holder configured to hold the second substrate; a first imaging device provided at the first holder and configured to image the second substrate held by the second holder; a first light irradiating device provided at the first holder and configured to irradiate light to the second substrate when the second substrate is imaged; a second imaging device provided at the second holder and configured to image the first substrate held by the first holder; and a second light irradiating device provided at the second holder and configured to irradiate light to the first substrate when the first substrate is imaged. Each of the first light irradiating device and the second light irradiating device is connected to a first light source configured to irradiate white light.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: May 31, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Toshifumi Inamasu, Shinichi Shinozuka
  • Publication number: 20200381255
    Abstract: A bonding apparatus configured to bond a first substrate and a second substrate includes a first holder configured to hold the first substrate; a second holder configured to hold the second substrate; a first imaging device provided at the first holder and configured to image the second substrate held by the second holder; a first light irradiating device provided at the first holder and configured to irradiate light to the second substrate when the second substrate is imaged; a second imaging device provided at the second holder and configured to image the first substrate held by the first holder; and a second light irradiating device provided at the second holder and configured to irradiate light to the first substrate when the first substrate is imaged. Each of the first light irradiating device and the second light irradiating device is connected to a first light source configured to irradiate white light.
    Type: Application
    Filed: May 27, 2020
    Publication date: December 3, 2020
    Inventors: Toshifumi Inamasu, Shinichi Shinozuka
  • Patent number: 8698052
    Abstract: In the present invention, temperature drop amounts of heating plate regions when the substrate is mounted on a heating plate are detected to detect a warped state of the substrate. From the temperature drop amounts of the heating plate regions, correction values for set temperatures of the heating plate regions are calculated. The calculation of the correction values for the set temperatures of the heating plate regions is performed by estimating steady temperatures within the substrate to be heat-processed on the heating plate from the temperature drop amounts of the heating plate regions using a correlation obtained in advance. From the estimated steady temperatures within the substrate and the temperature drop amounts of the heating regions, the correction values for the set temperatures of the heating plate regions are calculated. Based on the correction values for the set temperatures, the set temperatures of the heating plate regions are changed.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 15, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masahide Tadokoro, Ryoichi Uemura, Mitsuteru Yano, Shinichi Shinozuka
  • Publication number: 20120279955
    Abstract: In the present invention, temperature drop amounts of heating plate regions when the substrate is mounted on a heating plate are detected to detect a warped state of the substrate. From the temperature drop amounts of the heating plate regions, correction values for set temperatures of the heating plate regions are calculated. The calculation of the correction values for the set temperatures of the heating plate regions is performed by estimating steady temperatures within the substrate to be heat-processed on the heating plate from the temperature drop amounts of the heating plate regions using a correlation obtained in advance. From the estimated steady temperatures within the substrate and the temperature drop amounts of the heating regions, the correction values for the set temperatures of the heating plate regions are calculated. Based on the correction values for the set temperatures, the set temperatures of the heating plate regions are changed.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 8, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahide TADOKORO, Ryoichi UEMURA, Mitsuteru YANO, Shinichi SHINOZUKA
  • Patent number: 8253077
    Abstract: A processing temperature of thermal processing is corrected based on measurement of a first dimension of a resist pattern on a substrate from a previously obtained relation between a dimension of a resist pattern and a temperature of thermal processing, a second dimension of the resist pattern after thermal processing is performed at the corrected processing temperature is measured, a distribution within the substrate of the second dimension is classified into a linear component expressed by an approximated curved surface and a nonlinear component, a processing condition of exposure processing is corrected based on the linear component from a previously obtained relation between a dimension of a resist pattern and a processing condition of exposure processing, and thermal processing at the processing temperature corrected in a temperature correcting step and exposure processing under the processing condition corrected in an exposure condition correcting step are performed to form a predetermined pattern.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: August 28, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Kunie Ogata, Masahide Tadokoro, Tsuyoshi Shibata, Shinichi Shinozuka
  • Patent number: 8242417
    Abstract: In the present invention, temperature drop amounts of heating plate regions when the substrate is mounted on a heating plate are detected to detect a warped state of the substrate. From the temperature drop amounts of the heating plate regions, correction values for set temperatures of the heating plate regions are calculated. The calculation of the correction values for the set temperatures of the heating plate regions is performed by estimating steady temperatures within the substrate to be heat-processed on the heating plate from the temperature drop amounts of the heating plate regions using a correlation obtained in advance. From the estimated steady temperatures within the substrate and the temperature drop amounts of the heating regions, the correction values for the set temperatures of the heating plate regions are calculated. Based on the correction values for the set temperatures, the set temperatures of the heating plate regions are changed.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: August 14, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masahide Tadokoro, Ryoichi Uemura, Mitsuteru Yano, Shinichi Shinozuka
  • Patent number: 8135487
    Abstract: A temperature setting method of the present invention includes the steps of: measuring states of an etching pattern within the substrate for a substrate for which a series of photolithography processing including thermal processing and an etching treatment thereafter have been finished; calculating temperature correction values for regions of a thermal processing plate from measurement result of the states of the etching pattern within the substrate using a function between correction amounts for the states of the etching pattern and the temperature correction values for the thermal processing plate; and setting the temperature for each of the regions of the thermal processing plate by each of the calculated temperature correction values.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: March 13, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Masahide Tadokoro, Yoshitaka Konishi, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 8041525
    Abstract: In the present invention, for measurement of line widths, for example, at 36 locations within a substrate processed in a coating and developing treatment system, the 36 measurement points are divided and, for example, six substrates are used to measure the line widths at all of measurement points. In this event, the line widths at six measurement points are measured in each of the substrate, which exist in substrate regions different for each substrate. Then, the measurement results of the line widths at the measurement points of the substrates are combined, so that the line widths at 36 measurement points are finally detected. According to the present invention, the measurements of product substrates can be performed without decreasing the throughput of processing of the product substrates.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: October 18, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Yoshihiro Kondo, Kunie Ogata, Shinichi Shinozuka
  • Publication number: 20110242513
    Abstract: A processing temperature of thermal processing is corrected based on measurement of a first dimension of a resist pattern on a substrate from a previously obtained relation between a dimension of a resist pattern and a temperature of thermal processing, a second dimension of the resist pattern after thermal processing is performed at the corrected processing temperature is measured, a distribution within the substrate of the second dimension is classified into a linear component expressed by an approximated curved surface and a nonlinear component, a processing condition of exposure processing is corrected based on the linear component from a previously obtained relation between a dimension of a resist pattern and a processing condition of exposure processing, and thermal processing at the processing temperature corrected in a temperature correcting step and exposure processing under the processing condition corrected in an exposure condition correcting step are performed to form a predetermined pattern.
    Type: Application
    Filed: June 13, 2011
    Publication date: October 6, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kunie OGATA, Masahide Tadokoro, Tsuyoshi Shibata, Shinichi Shinozuka
  • Patent number: 7985516
    Abstract: A processing temperature of thermal processing is corrected based on measurement of a first dimension of a resist pattern on a substrate from a previously obtained relation between a dimension of a resist pattern and a temperature of thermal processing, a second dimension of the resist pattern after thermal processing is performed at the corrected processing temperature is measured, a distribution within the substrate of the second dimension is classified into a linear component expressed by an approximated curved surface and a nonlinear component, a processing condition of exposure processing is corrected based on the linear component from a previously obtained relation between a dimension of a resist pattern and a processing condition of exposure processing, and thermal processing at the processing temperature corrected in a temperature correcting step and exposure processing under the processing condition corrected in an exposure condition correcting step are performed to form a predetermined pattern.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: July 26, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Kunie Ogata, Masahide Tadokoro, Tsuyoshi Shibata, Shinichi Shinozuka
  • Patent number: 7968825
    Abstract: A thermal plate of a heating unit is divided into a plurality of thermal plate regions, and a temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting a temperature within the thermal plate can be set for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to a photolithography process are measured, and an in-plane tendency of the measured line widths is decomposed into a plurality of in-plane tendency components using a Zernike polynomial. From the calculated plurality of in-plane tendency components, in-plane tendency components improvable by changing the temperature correction values are extracted and added together to calculate an improvable in-plane tendency of the measured line widths within the substrate.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: June 28, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7957828
    Abstract: In the present invention, the line widths within a substrate of an etching pattern are measured for a substrate for which photolithography processing and an etching treatment thereafter have been finished. The line width measurement results are converted into the line widths of a resist pattern using relational expressions which have been obtained in advance. From the converted line widths of the resist pattern, coefficients of a polynomial function indicating variations within the substrate are calculated. Next, a function between line width correction amounts for the resist pattern and temperature correction values is used to calculate temperature correction values for the regions of the thermal plate to bring the coefficients of the polynomial function close to zero. Based on each of the calculated temperature correction values, the temperature for each of the regions is set.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: June 7, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Masahide Tadokoro, Megumi Jyousaka, Yoshitaka Konishi, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7897896
    Abstract: In the present invention, a thermal plate of a heating unit is divided into a plurality of thermal plate regions, and a temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting a temperature within the thermal plate can be set for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to a photolithography process are measured, and, from an in-plane tendency of the measured line widths, an in-plane tendency improvable by temperature correction and an unimprovable in-plane tendency are calculated using a Zernike polynomial. An average remaining tendency of the improvable in-plane tendency after improvement obtained in advance is added to the unimprovable in-plane tendency to estimate an in-plane tendency of the line widths within the substrate after change of temperature setting.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: March 1, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7867674
    Abstract: A pattern forming system 1 includes a checking apparatus 400 and a control section 500. The checking apparatus 400 is configured to measure and check a sidewall angle SWA of a resist pattern formed on a substrate W after a developing process. The control section 500 is configured to use a difference between a target value of the sidewall angle SWA of the resist pattern after the developing process and a check result of the sidewall angle SWA obtained by the checking apparatus 400, to set a process condition for a first heat process 71 to 74 or a second heat process 84 to 89 so as to cause the sidewall angle SWA to approximate the target value thereof after the developing process.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: January 11, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Michio Tanaka, Shinichi Shinozuka, Masahide Tadokoro, Kunie Ogata, Hiroshi Tomita, Ryoichi Uemura
  • Patent number: 7822574
    Abstract: In the present invention, substrates in a plurality of lots are successively processed in a coating and developing treatment system, and line width measurement is performed for some of substrates of the substrate which have been through processing in each lot. The line width measurement of two successive lots is performed such that the last line width measurement in the previous lot of the two successive lots has been completed at the time of completion of processing of a substrate which is first subjected to the line width measurement in the subsequent lot. According to the present invention, the measurement of product substrates can be performed without decreasing the throughput of the product substrates.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: October 26, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Kunie Ogata, Shinichi Shinozuka, Yoshihiro Kondo
  • Publication number: 20090269686
    Abstract: A processing temperature of thermal processing is corrected based on measurement of a first dimension of a resist pattern on a substrate from a previously obtained relation between a dimension of a resist pattern and a temperature of thermal processing, a second dimension of the resist pattern after thermal processing is performed at the corrected processing temperature is measured, a distribution within the substrate of the second dimension is classified into a linear component expressed by an approximated curved surface and a nonlinear component, a processing condition of exposure processing is corrected based on the linear component from a previously obtained relation between a dimension of a resist pattern and a processing condition of exposure processing, and thermal processing at the processing temperature corrected in a temperature correcting step and exposure processing under the processing condition corrected in an exposure condition correcting step are performed to form a predetermined pattern.
    Type: Application
    Filed: April 20, 2009
    Publication date: October 29, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kunie OGATA, Masahide TADOKORO, Tsuyoshi SHIBATA, Shinichi SHINOZUKA
  • Patent number: 7529595
    Abstract: It is an object of the present invention to realize, in a coating and developing apparatus including an inspection section, reduction in the startup time, cost reduction, and an improved operating rate of the inspection section. In the present invention, a control program of the coating and developing apparatus is set such that a processing flow and an inspection flow can be independently executed, the processing flow being a flow in which a substrate is carried to a processing station from a cassette station to be processed in the processing station and an aligner and thereafter is returned to the cassette station, and the inspection flow being a flow in which the substrate is carried from the cassette station to an inspection station to be inspected there, and is thereafter returned to the cassette station.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: May 5, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Shinichi Shinozuka, Shigeki Wada, Masami Yamashita
  • Publication number: 20090104548
    Abstract: A pattern forming system 1 includes a checking apparatus 400 and a control section 500. The checking apparatus 400 is configured to measure and check a sidewall angle SWA of a resist pattern formed on a substrate W after a developing process. The control section 500 is configured to use a difference between a target value of the sidewall angle SWA of the resist pattern after the developing process and a check result of the sidewall angle SWA obtained by the checking apparatus 400, to set a process condition for a first heat process 71 to 74 or a second heat process 84 to 89 so as to cause the sidewall angle SWA to approximate the target value thereof after the developing process.
    Type: Application
    Filed: September 13, 2006
    Publication date: April 23, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Michio Tanaka, Shinichi Shinozuka, Masahide Tadokoro, Kunie Ogata, Hiroshi Tomita, Ryoichi Uemura