Patents by Inventor Shinichi Tomizawa

Shinichi Tomizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7531425
    Abstract: This invention relates to a method of fabricating a bonded wafer 39 in which a bond wafer 31 and a base wafer 32, both of which are composed of silicon single crystal, are bonded while placing an oxide film 33 in between, and the bond wafer 31 is thinned. Use of modified chemically-etched wafers as both of the bond wafer 31 and base wafer 32 is successful in reducing an unbonded area UA therebetween after annealing for bonding, where the modified chemically-etched wafer refers to a wafer which is etched by alkali etching and succeeding acid etching, while setting etching amount larger in the alkali etching than in the acid etching.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: May 12, 2009
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masatake Nakano, Shinichi Tomizawa, Kiyoshi Mitani
  • Patent number: 6884696
    Abstract: A method for producing a bonded wafer by the ion implantation delamination method includes at least a step of bonding a bond wafer having a micro bubble layer formed by gaseous ion implantation and a base wafer serving as a support substrate and a step of delaminating the bond wafer at the micro bubble layer as a border to form a thin film on the base wafer. After the delamination of the bond wafer, the bonded wafer is subjected to a heat treatment in an atmosphere of an inert gas, hydrogen or a mixed gas thereof, then the bonded wafer is subjected to thermal oxidation to form a thermal oxide film on the surface of the thin film, and then the thermal oxide film is removed to reduce thickness of the thin film.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: April 26, 2005
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hiroji Aga, Shinichi Tomizawa, Kiyoshi Mitani
  • Publication number: 20050020030
    Abstract: This invention relates to a method of fabricating a bonded wafer 39 in which a bond wafer 31 and a base wafer 32, both of which are composed of silicon single crystal, are bonded while placing an oxide film 33 in between, and the bond wafer 31 is thinned. Use of modified chemically-etched wafers as both of the bond wafer 31 and base wafer 32 is successful in reducing an unbonded area UA therebetween after annealing for bonding, where the modified chemically-etched wafer refers to a wafer which is etched by alkali etching and succeeding acid etching, while setting etching amount larger in the alkali etching than in the acid etching.
    Type: Application
    Filed: November 19, 2002
    Publication date: January 27, 2005
    Inventors: Masatake Nakano, Shinichi Tomizawa, Koyoshi Mitani
  • Patent number: 6797632
    Abstract: In a method for producing a bonding wafer by the hydrogen ion delamination method comprising at least a step of bonding a base wafer and a bond wafer having a micro bubble layer formed by gas ion implantation and a step of delaminating them at the micro bubble layer as a border, a peripheral portion of a thin film formed on the base wafer is removed after the delamination step. Preferably, a region of 1-5 mm from the peripheral end of the base wafer is removed. In the production of a bonding wafer by the hydrogen ion delamination method, there can be provided a bonding wafer free from problems such as generation of particles from peripheral portion of the wafer and generation of cracks in the SOI layer.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: September 28, 2004
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masatake Nakano, Kiyoshi Mitani, Shinichi Tomizawa
  • Publication number: 20030181001
    Abstract: The present invention provides a method for producing a bonded wafer by the ion implantation delamination method comprising at least a step of bonding a bond wafer having a micro bubble layer formed by gaseous ion implantation and a base wafer serving as a support substrate and a step of delaminating the bond wafer at the micro bubble layer as a border to form a thin film on the base wafer, wherein, after the delamination of the bond wafer, the bonded wafer is subjected to a heat treatment in an atmosphere of an inert gas, hydrogen or a mixed gas thereof, then the bonded wafer is subjected to thermal oxidation to form a thermal oxide film on the surface of the thin film, and then the thermal oxide film is removed to reduce thickness of the thin film.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 25, 2003
    Inventors: Hiroji Aga, Shinichi Tomizawa, Kiyoshi Mitani