Abstract: Disclosed is a PCM signal reproducing/recording apparatus which comprises a reproducing device for reproducing a recording medium carrying PCM data and sub-code data recorded thereon, the sub-code data having sub-data and sub-ID for adding auxiliary information to the PCM data, and a recording device for recording the PCM data and sub-code data transmitted from the reproducing device onto a recording medium. The recording device is arranged to selectively record the sub-code data judged to be correct, onto a recording medium, of those sub-code data transmitted from the reproducing device.

Abstract: Disclosed is a PCM signal reproducing/recording apparatus which comprises a reproducing device for reproducing a recording medium carrying PCM data and sub-code data recorded thereon, the sub-code data having sub-data and sub-ID for adding auxiliary information to the PCM data, and a recording device for recording the PCM data and sub-code data transmitted from the reproducing device onto a recording medium. The recording device is arranged to selectively record the sub-code data judged to be correct, onto a recording medium, of those sub-code data transmitted from the reproducing device.

Abstract: PCM signals belonging to a first reproduction channel and a second reproduction channel and grouped into odd number data and even number data are previously recorded on a recording medium having a plurality of tracks in the form of frames each including at least a set of a first track and a second track. In the operation of reproducing the recorded PCM data, the PCM data reproduced by reproduction heads are stored in accordance with a first control signal, errors in the stored reproduced data are detected in accordance with a second control signal, the numbers of errors are counted, comparison is made between the error number of the odd number data and that of the even number data of the first channel and of the second channel, respectively, and the data which has been judged to include a larger number of errors are replaced by interpolated data and finally the interpolated data are mute-processed at the boundary between adjacent frames.

Abstract: A data outputting circuit including absolute value conversion circuit for converting digital data that is inputted with a determined sampling period into absolute value data, a register for storing the largest of the absolute value data provided within a predetermined period of time, a transferring register for receiving data and trransferring the data every predetermined period of time, and a compressing circuit adapted to compress compressing the data applied to the transferring register, whereby the circuit scale is reduced, and the data transferring time or the number of transferring lines is decreased.

Abstract: In a magnetic recording and reproducing circuit, a PLL circuit extracts a clock signal from the input signal while a clock generating circuit outputs a clock signal independently of the input signal, and one of the clock signals thus obtained is applied to a signal processing circuit depending on whether or not the PLL is in a locked state. When the PLL circuit is not in a locked state, the independently generated clock signal is used, and the processing circuit outputs data substantially at zero level, whereby the recording of noises on the magnetic tape is prevented.