Abstract: Blood pressure is estimated in a non-constraining manner continuously and in real time. A biological signal collected from a person's dorsal part is analyzed, vibration in the human body ascribable to a blood flow rate change in a period from the ventricular filling period to the isovolumetric systole is captured, and the state of fluctuation of an index indicating the state of the in vivo vibration is further captured. This fluctuation index correlates with a person's blood pressure. Therefore, it is possible to estimate whether the blood pressure is in a range indicating a normal-range blood pressure or in a range indicating a high blood pressure, only by having the person sit or lie supine on a surface provided with a biological signal measurement device to measure a biological signal in a non-constraining manner, so as to make the biological signal measurement device contiguous with the person's dorsal part.

Abstract: For a printing system, a printing device and an information terminal are connected by communication. The printing device includes a wired communication unit configured to communicate by USB, a connection confirmation unit configured to confirm the connection to the information terminal, and a boot application determination unit configured to notify the information terminal of the application to be booted at the information terminal. The information terminal includes a wired communication unit configured to communicate by USB, a wireless communication unit configured to communicate with a server, an application existence determination unit configured to determine installation, a download site determination unit configured to determine a server, an install unit configured to acquire the application from the server and install, and an application boot unit configured to boot the application.

Abstract: Information that is transferred through a bus BUS1 (conforming to IEEE 1394) is downloaded into a rewrite area storing device information (such as GUID or config ROM) and data transfer control program information (such as a SBP-2 firmware program), and rewriter processing is performed to write the information into the rewrite area. When it is detected that no device is connected to a bus BUS2 (conforming to ATA/ATAPI or IDE), the rewriter processing starts. The detection of whether or not a device is connected to BUS2 is based on the result of an access to a register of the device. In a download mode, the information is written into the rewrite area by transferring data to and from a PC connected to BUS1.

Abstract: The system stores a storage address ADK1 of a page table element PEK1 that was being processed when a bus reset occurred, of page table elements of a page table specified by an ORB1. The system then reads out a storage address ADK2 of a page table element PEK2 having the same element number as PEK1, of page table elements of an ORB2 after the bus reset occurs, and restarts data transfer when ADK1 and ADK2 are the same. When the page table is absent, addresses DAD1 and DAD2 that are specified directly by the ORB1 and the ORB2 are compared. When data transfer is not be restarted but a command CMD1 of the ORB1 has already been issued to a device, the CMD1 is aborted.

Abstract: A data transfer control system includes: a port control section which controls ports P1 and P2 respectively connected with an electronic instrument PC1 and an electronic instrument PC2; and a bus reset issue section which issues a bus reset. The port P2 is set to a disabled state, and then the bus reset is issued to cause the electronic instrument PC1 to acquire an access right. The port P2 is set to an enabled state after the bus reset has been issued and the electronic instrument PC1 has acquired the access right. After the electronic instrument PC2 has been detected to be in a suspended state, a resume packet is transferred to the electronic instrument PC2. The port P2 is set to a disabled state after the power for the data transfer control system has been turned on.

Abstract: A data transfer control system includes a buffer controller that controls access to a data buffer and a transfer controller that controls data transfer between a PC connected to a BUS1 and the logical units LUN1 and LUN2 connected to a BUS2. The transfer controller includes: a command processing section that starts data transfer to or from the LUN1 based on a command indicated by an ORB for the LUN1 when the ORB is received, and starts data transfer to or from the LUN2 based on a command indicated by an ORB for the LUN2 when the ORB is receive; and a wait processing section that waits the processing of the ORB for the LUN2, when a bus reset occurs during the processing of the ORB for the LUN1 and the ORB for the LUN2 is received after the bus reset has occurred.

Abstract: A data transfer control system receives a command packet ORB transferred through a bus BUS1 (IEEE 1394), issues a command indicated by ORB to a device connected to a bus BUS2 (ATA (IDE)/ATAPI), and orders start of a DMA transfer. The command issued based on ORB is aborted after the completion of the DMA transfer. The data transfer control system compares contents of a command packet ORB1 transferred before a bus reset with contents of a command packet ORB2 transferred after the bus reset. If the contents are different, a command issued based on ORB1 is aborted after completion of a DMA transfer. Dummy data is transferred between the data transfer control system and the device connected to the bus BUS2 until a DMA transfer is completed. Dummy data transfer is controlled by performing a dummy update on a pointer.

Abstract: A data transfer control system receives a command packet ORB (SBP-2) transferred through a bus BUS1 (IEEE1394), and issues a command included in the ORB to a device connected with a bus BUS2 (ATA (IDE)/ATAPI). The data transfer control system sets a sufficiently large fixed DMA data length irrespective of the type of the issued command, and instructs start of DMA transfer to or from the device connected with the bus BUS2. The data transfer control system aborts the DMA transfer when a device connected with BUS2 informs of completion of command processing. As the fixed DMA data length, a value greater than a storage capacity of a storage or a value greater than a data length which can be designated by a command is employed. The data transfer control system issues a command included in the ORB to a device connected with the bus BUS2 without decoding the command.

Abstract: A data transfer control system for controlling data transfer between a first electronic apparatus coupled to a first bus and a device coupled to a second bus including a coupling control unit that issues an instruction to execute attachment to the first bus before power supply to the device is turned on, a bus state monitoring unit that detects whether or not the first bus enters a reset state after attachment and a power supply control unit that implements power supply control to turn on power supply to the device if a reset state of the first bus is detected.

Abstract: A data transfer control system that controls data transfer between a first electronic apparatus connected via a first bus and a device connected via a second bus, including: a management section that conducts a process of receiving a login request when a login request for acquirement of a right to access to the device comes from the first electronic apparatus and that conducts a process of receiving a logout request when a logout request for abandonment of the access right acquired upon receipt of the login request comes from the first electronic apparatus; and a power control section that conducts power control by turning on power supply to the device when the login request to the device comes from the first electronic apparatus.

Abstract: The objective of the present invention is to provide a data transfer control device, information storage medium, and electronic equipment that can relieve the inconveniences caused whenever a reset that clears node topology information occurs. If a bus reset occurs during a data transfer period in a data transfer control device in accordance with the IEEE 1394 standard, and also the content of ORBs before and after the bus reset is the same, data transfer restarts from a resumption at the point at which the bus reset occurred, thus preventing duplicate printing in a printer. Whenever a bus reset occurs during a data transfer period, the continuation flag is set to on. The first command block ORB comprising a print command that transferred in after the bus reset is used in the comparison with the pre-bus-reset ORB. When no ACK is returned from the initiator because of a bus reset, a transition to a dead state occurs.

Abstract: A data transfer control system includes a buffer controller that controls access to a data buffer and a transfer controller that controls data transfer between a PC connected to a BUS1 and the logical units LUN1 and LUN2 connected to a BUS2. The transfer controller includes: a command processing section that starts data transfer to or from the LUN1 based on a command indicated by an ORB for the LUN1 when the ORB is received, and starts data transfer to or from the LUN2 based on a command indicated by an ORB for the LUN2 when the ORB is receive; and a wait processing section that waits the processing of the ORB for the LUN2, when a bus reset occurs during the processing of the ORB for the LUN1 and the ORB for the LUN2 is received after the bus reset has occurred.

Abstract: A data transfer control system receives a command packet ORB transferred through a bus BUS 1 (IEEE 1394), issues a command indicated by ORB to a device connected to a bus BUS2 (ATA (IDE)/ATAPI), and orders start of a DMA transfer. The command issued based on ORB is aborted after the completion of the DMA transfer. The data transfer control system compares contents of a command packet ORB1 transferred before a bus reset with contents of a command packet ORB2 transferred after the bus reset. If the contents are different, a command issued based on ORB1 is aborted after completion of a DMA transfer. Dummy data is transferred between the data transfer control system and the device connected to the bus BUS2 until a DMA transfer is completed. Dummy data transfer is controlled by performing a dummy update on a pointer.

Abstract: A data transfer control system receives a command packet ORB transferred through a bus BUS1 (IEEE1394), issues a command indicated by: ORB to a device connected to a bus BUS2 (ATA (IDE)/ATAPI), and orders start of a DMA transfer. The command issued based on ORB is aborted after the completion of the DMA transfer. The data transfer control system compares contents of a command packet ORB1 transferred before a bus reset with contents of a command packet ORB2 transferred after the bus reset. If the contents are different, a command issued based on ORB1 is aborted after completion of a DMA transfer. Dummy data is transferred between the data transfer control system and the device connected to the bus BUS2 until a DMA transfer is completed. Dummy data transfer is controlled by performing a dummy update on a pointer.

Abstract: Information that is transferred through a bus BUS 1 (conforming to IEEE 1394) is downloaded into a rewrite area storing device information (such as GUID or config ROM) and data transfer control program information (such as a SBP-2 firmware program), and rewriter processing is performed to write the information into the rewrite area. When it is detected that no device is connected to a bus BUS2 (conforming to ATA/ATAPI or IDE), the rewriter processing starts. The detection of whether or not a device is connected to BUS2 is based on the result of an access to a register of the device. In a download mode, the information is written into the rewrite area by transferring data to and from a PC connected to BUS 1.

Abstract: A data transfer control system receives a command packet ORB (SBP-2) transferred through a bus BUS1 (IEEE1394), and issues a command included in the ORB to a device connected with a bus BUS2 (ATA (IDE)/ATAPI). The data transfer control system sets a sufficiently large fixed DMA data length irrespective of the type of the issued command, and instructs start of DMA transfer to or from the device connected with the bus BUS2. The data transfer control system aborts the DMA transfer when a device connected with BUS2 informs of completion of command processing. As the fixed DMA data length, a value greater than a storage capacity of a storage or a value greater than a data length which can be designated by a command is employed. The data transfer control system issues a command included in the ORB to a device connected with the bus BUS2 without decoding the command.

Abstract: A data transfer control system includes: a port control section which controls ports P1 and P2 respectively connected with an electronic instrument PC1 and an electronic instrument PC2; and a bus reset issue section which issues a bus reset. The port P2 is set to a disabled state, and then the bus reset is issued to cause the electronic instrument PC1 to acquire an access right. The port P2 is set to an enabled state after the bus reset has been issued and the electronic instrument PC1 has acquired the access right. After the electronic instrument PC2 has been detected to be in a suspended state, a resume packet is transferred to the electronic instrument PC2. The port P2 is set to a disabled state after the power for the data transfer control system has been turned on.

Abstract: The objective of the present invention is to provide a data transfer control device, information storage medium, and electronic equipment that can relieve the inconveniences caused whenever a reset that clears node topology information occurs. If a bus reset occurs during a data transfer period in a data transfer control device in accordance with the IEEE 1394 standard, and also the content of ORBs before and after the bus reset is the same, data transfer restarts from a resumption at the point at which the bus reset occurred, thus preventing duplicate printing in a printer. Whenever a bus reset occurs during a data transfer period, the continuation flag is set to on. The first command block ORB comprising a print command that transferred in after the bus reset is used in the comparison with the pre-bus-reset ORB. When no ACK is returned from the initiator because of a bus reset, a transition to a dead state occurs.

Abstract: There is disclosed a system for detecting a flat portion of a peripheral surface of a vehicle wheel disposed in rolling engagement with a track rail. A detecting device is provided for detecting one of acceleration representative of vibration of the wheel, stress developing in a support member connected to the wheel, and a noise produced by the rolling of the wheel on the rail to produce a first detection signal in response to a predetermined angular movement of the wheel. A device is provided for determining whether the first detection signal is above a predetermined reference level to produce a second detection signal in synchronism with the rotation of the wheel and indicative of a wheel flat portion of above a predetermined length.