Patents by Inventor Shinichiro Ishino
Shinichiro Ishino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100127622Abstract: A plasma display panel including a front panel including a front glass substrate, a display electrode formed on the substrate, a dielectric layer formed to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting the display electrode, and a barrier rib for partitioning the discharge space. The protective layer includes a base film on the dielectric layer and aggregated particles of a plurality of aggregated metal-oxide crystal particles attached to the base film so that they are distributed over an entire surface. The aggregated particles are attached so that the number of aggregated particles per 10000 ?m2 is not less than 45 and not more than 350.Type: ApplicationFiled: January 27, 2009Publication date: May 27, 2010Applicant: PANASONIC CORPORATIONInventors: Yoshinao Ooe, Shinichiro Ishino, Yuichiro Miyamae, Koyo Sakamoto, Shinya Nakashima, Ryoichi Inoue, Kaname Mizokami
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Publication number: 20100130088Abstract: A plasma display panel capable of displaying high definition at high luminance with lower power consumption is obtainable. Metal oxide paste formed of metal oxide particles, organic resin component, and diluting agent is painted on primary film (91), which is then fired, so that multiple metal oxide particles are attached to primary film (91). The metal oxide paste contains metal oxide particles not greater than 1.5 vol % and the organic resin component within a range from 8.0 to 20.0 vol %.Type: ApplicationFiled: April 6, 2009Publication date: May 27, 2010Applicant: PANASONIC CORPORATIONInventors: Shinichiro Ishino, Koyo Sakamoto, Yuichiro Miyamae, Kaname Mizokami, Yoshinao Ooe
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Publication number: 20100117532Abstract: A plasma display panel includes a front panel including a front glass substrate, a display electrode formed on the substrate, a dielectric layer formed to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel facing the front panel so that discharge space is formed and including an address electrode in a direction intersecting the display electrode, and a barrier rib for partitioning the discharge space. In the protective layer, a base film is formed on the dielectric layer and aggregated particles of metal oxide crystal particles are attached to the base film so that they are attached to an entire surface of an effective display area and an area outside the effective display area in the periphery of the effective display area with one or more non-formation regions provided in the area outside the effective display area.Type: ApplicationFiled: December 12, 2008Publication date: May 13, 2010Inventors: Shinichiro Ishino, Kaname Mizokami, Hideji Kawarazaki, Koyo Sakamoto, Yuichiro Miyamae, Yoshinao Ooe
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Publication number: 20100112891Abstract: In the method of producing a PDP, the protective layer is produced in the following steps. First, deposit a base film on the dielectric layer, and then apply a crystalline particle paste produced by dispersing plural crystalline particles made of metal oxide, onto the base film to form a crystalline particle paste film. After that, fire the base film and crystalline particle paste film to make the plural crystalline particles adhere so as to be distributed over the whole surface. The crystalline particle paste has a viscosity between 1 Pa·s and 30 Pa·s inclusive at a shear velocity of 1.0 s?1.Type: ApplicationFiled: March 10, 2009Publication date: May 6, 2010Inventors: Shinichiro Ishino, Kaname Mizokami, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kado, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
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Publication number: 20100109524Abstract: A plasma display panel including a front panel including front glass substrate, a display electrode formed on the substrate, a dielectric layer formed to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting, the display electrode, and a barrier rib for partitioning the discharge space. The protective layer includes a base film on the dielectric layer and aggregated particles of a plurality of aggregated metal oxide crystal particles attached to the base film so that they are distributed over an entire surface. The aggregated particles have distribution of peak intensity values in a spectrum in a wavelength range of not less than 200 nm and not more than 300 nm of a cathode luminescence within 240% of a cumulative average value.Type: ApplicationFiled: January 27, 2009Publication date: May 6, 2010Inventors: Kaname Mizokami, Shinichiro Ishino, koyo Sakamoto, Yuichiro Miyamae, Yoshinao Ooe
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Publication number: 20100102722Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over the entire surface, and the base film is made of MgO containing Al.Type: ApplicationFiled: November 12, 2008Publication date: April 29, 2010Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
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Publication number: 20100102723Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over its entire surface.Type: ApplicationFiled: November 12, 2008Publication date: April 29, 2010Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyumi Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
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Publication number: 20100084973Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over the entire surface, and the crystal particle has a crystal face having a shape of polyhedron with seven faces or more.Type: ApplicationFiled: November 12, 2008Publication date: April 8, 2010Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
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Publication number: 20100047441Abstract: A method of manufacturing a plasma display panel that includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed and including an address electrode formed in a direction intersecting the display electrode, and a barrier rib for partitioning the discharge space. Forming the protective layer on the front panel includes: vapor-depositing a base film on the dielectric layer; forming an aggregated particle paste film containing an aggregated particle of a plurality of crystal particles of metal oxide on the base film; and firing the base film and the aggregated particle paste film, thereby attaching a plurality of the aggregated particles on the base film.Type: ApplicationFiled: November 12, 2008Publication date: February 25, 2010Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
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Publication number: 20090102378Abstract: A plasma display panel comprises front plate (20) having display electrode (24) formed on a glass substrate with discharge gap (50), and back plate (30) having barrier ribs (34) formed to divide discharge cells, and arranged in a manner to confront the front plate (20). The barrier ribs (34) comprise vertical barrier rib (34a) arranged in parallel to an address electrode and horizontal barrier rib (34b) arranged in a manner to cross the vertical barrier rib (34a), and the vertical barrier rib (34a) has a shape satisfying the formula of H1>H2>H3, where H1 denotes a height of it at crossing portion (56) with the horizontal barrier rib (34b), H2 a height at a position of the discharge gap (50) of the display electrode (24), and H3 a height at a predetermined point between the position of the discharge gap (50) and the position of the crossing portion (56) with the horizontal barrier rib (34b).Type: ApplicationFiled: August 7, 2007Publication date: April 23, 2009Inventors: Morio Fujitani, Keisuke Sumida, Shinichiro Ishino, Kenichi Kusaka
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Patent number: 7422503Abstract: Disclosed here is a plasma display panel having stable addressing characteristics and a method of manufacturing a plasma display panel having such a reliable structure. According to the plasma display panel and the manufacturing method, on back plate (2) that confronts front plate (1) having scan electrodes (6) and sustain electrodes (7) thereon, data electrodes (10), first dielectric layer (17) disposed to cover the data electrodes, priming electrodes (15), and second dielectric layer (18) disposed to cover the priming electrodes are formed in the order named; at the same time, the softening temperatures of the materials forming the components disposed on the back plate are determined so as to become lower in the order named. The temperature setting protects first dielectric layer (17) from deterioration or deformation, improving dielectric voltage between data electrodes (10) and priming electrodes (15).Type: GrantFiled: May 18, 2004Date of Patent: September 9, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
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Publication number: 20080157672Abstract: Disclosed is a PDP and a manufacturing method therefor having improved display performance even if the PDP is of a fine-cell structure. A protective layer of the PDP is composed of an MgO film layer and an MgO particle layer that is made of MgO particles. The MgO particles are formed by burning an MgO precursor and satisfy that a/b?1, where a denotes a spectrum integral value in a wavelength region of a CL spectrum from 200 nm to 300 nm, exclusive of 300 nm, and b denotes a spectrum integral value in a wavelength region of the CL spectrum from 300 nm to 550 nm, exclusive of 550 nm. With provision of the MgO particle layer, the discharge characteristics of the protective layer improve (shorter discharge delay and less temperature dependence of the discharge delay). Consequently, the PDP is ensured to exhibit excellent display performance.Type: ApplicationFiled: December 27, 2007Publication date: July 3, 2008Inventors: Takuji Tsujita, Yusuke Fukui, Masaharu Terauchi, Mikihiko Nishitani, Michiko Okafuji, Shinichiro Ishino, Kaname Mizokami
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Patent number: 7378796Abstract: A plasma display panel has a stable addressing characteristic, no dielectric breakdown, and high reliability. Data electrodes (10), first dielectric layer (17) for covering the data electrodes (10), priming electrodes (15), and second dielectric layer (18) for covering the priming electrodes (15) are sequentially formed on back substrate (2). Slotted parts (10a) are formed in a part of each data electrode (10). Thus, data electrodes (10) are prevented from deforming during the manufacturing, and dielectric voltage between data electrodes (10) and priming electrodes (15) is improved.Type: GrantFiled: June 1, 2004Date of Patent: May 27, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
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Publication number: 20060279214Abstract: Disclosed here is a plasma display panel having stable addressing characteristics and a method of manufacturing a plasma display panel having such a reliable structure. According to the plasma display panel and the manufacturing method, on back plate (2) that confronts front plate (1) having scan electrodes (6) and sustain electrodes (7) thereon, data electrodes (10), first dielectric layer (17) disposed to cover the data electrodes, priming electrodes (15), and second dielectric layer (18) disposed to cover the priming electrodes are formed in the order named; at the same time, the softening temperatures of the materials forming the components disposed on the back plate are determined so as to become lower in the order named. The temperature setting protects first dielectric layer (17) from deterioration or deformation, improving dielectric voltage between data electrodes (10) and priming electrodes (15).Type: ApplicationFiled: May 18, 2004Publication date: December 14, 2006Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
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Publication number: 20060113914Abstract: A plasma display panel has a stable addressing characteristic, no dielectric breakdown, and high reliability. Data electrodes (10), first dielectric layer (17) for covering them, priming electrodes (15), and second dielectric layer (18) for covering them are sequentially formed on back substrate (2). Slotted parts (10a) are formed in a part of each data electrode (10). Thus, data electrodes (10) are prevented from deforming during the manufacturing, and dielectric voltage between data electrodes (10) and priming electrodes (15) is improved.Type: ApplicationFiled: June 1, 2004Publication date: June 1, 2006Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
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Patent number: 6506540Abstract: A photopolymerizable composition comprising (A) a polymer binder, (B) a photopolymerizable monomer and (C) a photopolymerization initiator, wherein the component (B) is at least one compound represented by the following formula (1):Type: GrantFiled: May 15, 2001Date of Patent: January 14, 2003Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventors: Akira Kumazawa, Shinichiro Ishino, Hiroyuki Obiya, Kenji Tazawa
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Publication number: 20020031723Abstract: A photopolymerizable composition comprising (A) a polymer binder, (B) a photopolymerizable monomer and (C) a photopolymerization initiator, wherein the component (B) is at least one compound represented by the following formula (1): 1Type: ApplicationFiled: May 15, 2001Publication date: March 14, 2002Inventors: Akira Kumazawa, Shinichiro Ishino, Hiroyuki Obiya, Kenji Tazawa