Patents by Inventor Shinichiro Kakita

Shinichiro Kakita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200035495
    Abstract: Apparatus and methods of chemical-mechanical polishing of a layer on a wafer. A plurality of polishers arranged on a rotating plate, and a carrier is configured to hold the wafer and to place the layer in contact with the polishers. Each polisher includes a platen and a force-applying device operatively connected to the platen, and the force-applying device is configured to apply a variable force to the platen in order to change a rate of material removal over an area of the layer on the wafer contacted by a polishing pad carried by the platen.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 30, 2020
    Inventors: Dewei Xu, Lili Cheng, Shinichiro Kakita, Ushasree Katakamsetty, Roderick A. Augur
  • Patent number: 6905957
    Abstract: A preceding wafer having an aluminum wiring and a silicon oxide film formed on an insulating film is chemico-mechanically polished. In the stage in which surface irregularities of the silicon oxide film are eliminated, polishing is discontinued. On the basis of the result, a polishing time is determined in accordance with the following formula: T=(D1?D2)/v+t1 where, D1 represents the thickness in the stage in which polishing is discontinued; D2, a target thickness; t1, a time required from the initial thickness to reach the thickness D1; and the polishing rate of the material of the silicon oxide film formed on a flat substrate is denoted as v.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: June 14, 2005
    Assignee: NEC Corporation
    Inventor: Shinichiro Kakita
  • Publication number: 20030077904
    Abstract: A preceding wafer having an aluminum wiring and a silicon oxide film formed on an insulating film is chemico-mechanically polished. In the stage in which surface irregularities of the silicon oxide film are eliminated, polishing is discontinued.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 24, 2003
    Applicant: NEC Corporation
    Inventor: Shinichiro Kakita