Abstract: To provide an exposure apparatus and an exposure method able to correct an image-placement error during an exposure which is unable to decrease only by correcting electron beam description data of a mask pattern, and a semiconductor device manufacturing method used the same, wherein an image placement R2 of a mask is measured at an inversion posture against an exposure posture (ST7), the measured image placement R2 is corrected with considering a pattern displacement caused by gravity at the exposure posture and a first correction data ?1 is prepared based on a difference of the corrected image placement and a designed data (ST10), and an exposure is performed by deflecting charged particle beam to correct a position of a pattern to be exposed to a subject based on the first correction data ?1 (ST13).

Abstract: A wafer, exposure mask, method for detecting an alignment mark and method for exposure, which make it possible to improve accuracy of the alignment as well as correction of a gap between the wafer and the exposure mask, are provided. There is provided a wafer having alignment marks (wafer marks) with edges for causing inspection light for alignment to scatter at an exposure surface during proximity exposure. The wafer mark is characterized by having dot pattern groups, which are made up of dot patterns arrayed in a predetermined direction. The dot pattern group is configured by arranging dot patterns in Direction X with an arrangement interval P2. The arrangement interval P2 is wider than an arrangement interval P1 for the dot patterns. Further, there is provided an exposure mask, which is used in similar proximity exposure, having alignment marks, as mask marks, which have a similar configuration as that of the wafer marks.

Abstract: To provide an exposure apparatus and an exposure method able to correct an image-placement error during an exposure which is unable to decrease only by correcting electron beam description data of a mask pattern, and a semiconductor device manufacturing method used the same, wherein an image placement R2 of a mask is measured at an inversion posture against an exposure posture (ST7), the measured image placement R2 is corrected with considering a pattern displacement caused by gravity at the exposure posture and a first correction data ?1 is prepared based on a difference of the corrected image placement and a designed data (ST10), and an exposure is performed by deflecting charged particle beam to correct a position of a pattern to be exposed to a subject based on the first correction data ?1 (ST13).

Abstract: In fabrication of a semiconductor device having plural patterns on a plurality of layers by using complementary divided masks each having alignment marks distributed therein, because of the presence of a plurality of complementary divided mask layers, misalignment between respective layers tends to occur. To solve this problem, divided alignment marks (M1a, M2a, M3a, M4a) are formed in respective complementary divided regions corresponding to respective blocks (B1, B2, B3, B4) of complementary divided masks obtained by dividing a stencil mask. By distributing alignment marks to respective complementary divided masks, a positional deviation between respective masks is averaged, thereby enabling to fabricate a semiconductor device in which a large positional deviation between patterns of adjoining layers is eliminated.

Abstract: A mask capable of improving superimposing accuracy of patterns drawn on a plurality of masks, a production method of a semiconductor device capable of improving a yield of semiconductor devices, and a semiconductor device wherein a pattern can be made finer are provided.

Abstract: A wafer, exposure mask, method for detecting an alignment mark and method for exposure, which make it possible to improve accuracy of the alignment as well as correction of a gap between the wafer and the exposure mask, are provided. There is provided a wafer having alignment marks (wafer marks) with edges for causing inspection light for alignment to scatter at an exposure surface during proximity exposure. The wafer mark is characterized by having dot pattern groups, which are made up of dot patterns arrayed in a predetermined direction. The dot pattern group is configured by arranging dot patterns in Direction X with an arrangement interval P2. The arrangement interval P2 is wider than an arrangement interval P1 for the dot patterns. Further, there is provided an exposure mask, which is used in similar proximity exposure, having alignment marks, as mask marks, which have a similar configuration as that of the wafer marks.