Patents by Inventor Shinichiro Sekijima

Shinichiro Sekijima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11792920
    Abstract: A circuit board includes an interconnect and an insulating layer that covers the interconnect. The interconnect includes a first interconnect that is formed to serve as a recognition mark of which planar shape is a predetermined shape. The insulating layer has a through-hole of which planar shape is variant and that penetrates the insulating layer in a thickness direction of the insulating layer such that an entire upper surface of the first interconnect is exposed. The through-hole includes a first through-hole of which planar shape is a predetermined shape and that penetrates the insulating layer in the thickness direction such that the entire upper surface of the first interconnect is exposed and a second through-hole that serves as part of an inner wall surface of the first through-hole and that penetrates the insulating layer in the thickness direction.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: October 17, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Shinichiro Sekijima
  • Publication number: 20230005830
    Abstract: A semiconductor apparatus includes a first substrate having a first major surface and a plurality of first conductive pads on the first major surface, a second substrate having a second major surface opposing the first major surface, and having a plurality of second conductive pads on the second major surface, a semiconductor device disposed between the first substrate and the second substrate and mounted on the first major surface of the first substrate, and a plurality of bonding members that bond the first conductive pads and the second conductive pads together, wherein in a plan view normal to the first major surface, the first substrate has a rectangular plane shape with a first side and a second side each extending parallel to a first direction, and a third side and a fourth side each extending parallel to a second direction perpendicular to the first direction.
    Type: Application
    Filed: June 27, 2022
    Publication date: January 5, 2023
    Inventor: Shinichiro SEKIJIMA
  • Publication number: 20220399293
    Abstract: A semiconductor apparatus includes a first substrate having a first surface and a first conductive pad on the first surface, a second substrate having a second surface opposing the first surface, and having a second conductive pad on the second surface, a semiconductor device disposed between the first substrate and the second substrate and mounted on the first surface of the first substrate, and a conductive core ball in contact with the first conductive pad and the second conductive pad, wherein a maximum dimension of the conductive core ball in a first direction perpendicular to the first surface is smaller than a maximum diameter of the conductive core ball in a plane parallel to the first surface, and wherein the conductive core ball includes a first contact surface in direct contact with the first conductive pad, and a second contact surface in direct contact with the second conductive pad.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 15, 2022
    Inventor: Shinichiro SEKIJIMA
  • Publication number: 20220369454
    Abstract: A circuit board includes an interconnect and an insulating layer that covers the interconnect. The interconnect includes a first interconnect that is formed to serve as a recognition mark of which planar shape is a predetermined shape. The insulating layer has a through-hole of which planar shape is variant and that penetrates the insulating layer in a thickness direction of the insulating layer such that an entire upper surface of the first interconnect is exposed. The through-hole includes a first through-hole of which planar shape is a predetermined shape and that penetrates the insulating layer in the thickness direction such that the entire upper surface of the first interconnect is exposed and a second through-hole that serves as part of an inner wall surface of the first through-hole and that penetrates the insulating layer in the thickness direction.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 17, 2022
    Inventor: Shinichiro Sekijima